Difference between revisions of "NXP PN640 Perf Board"

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(Created page with "__TOC__ This article describes specifics for the NXP PN640 Performance evaluation board.<br> 450px == Preparing for J-L...")
 
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== Example Project==
 
== Example Project==
The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the [SiliconVendor] [EvalBoardName].<br>It is a simple Hello World sample linked into the internal flash.<br>
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The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the NXP PN640 Performance Board.<br>It is a simple Hello World sample linked into the internal flash.<br>
 
====SETUP====
 
====SETUP====
 
*J-Link software: V7.92g
 
*J-Link software: V7.92g

Revision as of 15:07, 20 September 2023

This article describes specifics for the NXP PN640 Performance evaluation board.
NXP PN640 Perf Board V1.2 PN7362AU board.jpg

Preparing for J-Link

  • Connect the J-Link to J25
  • Power the board via Main USB.
  • Verify the Connection with e.g. J-Link Commander. The output should look as follows:

NXP PN640 Perf Board V1.2 PN7362AU connect.png

Example Project

The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the NXP PN640 Performance Board.
It is a simple Hello World sample linked into the internal flash.

SETUP