Difference between revisions of "GigaDevice GD32C1"
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==Watchdog Handling== |
==Watchdog Handling== |
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− | *The device does have 2 watchdogs. |
+ | *The device does have 2 watchdogs, FWDGT and WWDGT. |
− | *The |
+ | *The WWDGT watchdog is fed during flash programming. |
==Device Specific Handling== |
==Device Specific Handling== |
Revision as of 16:24, 16 February 2024
The GigaDevice GD32C1 series are 32-bit general-purpose microcontrollers based on the ARM Cortex-M4 processor.
Contents
Flash Banks
Internal Flash
Flash Bank | Base address | Size | J-Link Support |
---|---|---|---|
Main flash | 0x08000000 | Up to 256 KB | |
Information flash | 0x1FFFB000 | 18 KB | |
Option Bytes | 0x1FFFF800 | 16 B | |
OTP | 0x1FFF7000 | 512 B |
Watchdog Handling
- The device does have 2 watchdogs, FWDGT and WWDGT.
- The WWDGT watchdog is fed during flash programming.
Device Specific Handling
Connect
- On Connect, protection level is checked. For further information regarding this, please click here.
Reset
- The device uses normal Cortex-M reset, no special handling necessary, like described here.