Difference between revisions of "Infineon PMG1 S0"
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| − | EZ-PD PMG1 is a family of high-voltage USB PD MCUs with Arm® Cortex®-M0/Cortex-M0+ CPU. The PMG1 family of controllers includes different MCUs with integrated USB PD controller, analog, and digital peripherals. You can choose the controller based on the design requirement. PMG1 is targeted at embedded systems that provide or consume power to or from a high-voltage USB-C PD port and leverage the MCU to provide additional control capability. |
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| − | == Flash memory layout == |
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| − | The PMG1-S0 / CYPM1011 series devices have 64KB internal flash. The flashes consists of one big sector. |
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| − | {| class="wikitable" |
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| − | |- |
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| − | ! Flash !! Start address !! End address !! Sector size !! Sector count !! Total size |
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| − | | internal flash || 0x00000000 || 0x0000FFFF || 64 KB || 1 || 64 KB |
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| − | |} |
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| − | =Connection behavior= |
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| − | The connect sequence of PMG1-S0 devices is very time critical and is performed from the J-Link's side directly. |
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| − | A PMG1-S0 device with reconfigured SWD pins runs automatically the acquire sequence to get control of the SWD pins for debugging back. |
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| − | ===Note=== |
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| − | As the PMG1-S0 series device has no reset pin, for the acquire sequence VSupply gets toggled instead. |
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| − | Therefore the target device needs to be supplied via Pin 19 of the J-Link and Pin 1 also needs to be connected to pin 19 of the J-Link. |
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| − | Make sure to set VSupply (pin 19) to 3.3 V before connecting it to the target board. |
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Revision as of 09:46, 14 May 2024
Page moved here
