Difference between revisions of "Renesas RX72T"
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This article describes device specifics of the Renesas RX72T series microcontrollers. |
This article describes device specifics of the Renesas RX72T series microcontrollers. |
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* J-Link software V6.47e or later: [https://www.segger.com/downloads/jlink/#J-LinkSoftwareAndDocumentationPack Download] |
* J-Link software V6.47e or later: [https://www.segger.com/downloads/jlink/#J-LinkSoftwareAndDocumentationPack Download] |
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Programming of the internal code flash, data flash and option-setting memory has been verified with the following J-Flash project and data files: |
Programming of the internal code flash, data flash and option-setting memory has been verified with the following J-Flash project and data files: |
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+ | * [[File:FlashProgVerify_Renesas_R5F572TK_RX72T.zip]] |
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− | [[File:FlashProgVerify_Renesas_R5F572TK_RX72T.zip]] |
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=Option-setting memory= |
=Option-setting memory= |
Latest revision as of 13:29, 15 May 2024
This article describes device specifics of the Renesas RX72T series microcontrollers.
Requirements
- J-Link software V6.47e or later: Download
Programming of the internal code flash, data flash and option-setting memory has been verified with the following J-Flash project and data files:
Option-setting memory
Programming the option setting memory at addr. 0x12_0040 is supported.
User boot area
Programming of UB code A and UB code B in user boot area at 0xFF7F_FFE8 is not suppored
Supported debug interfaces
The following debug interfaces are supported for the RX72T series:
- JTAG
- FINE