Difference between revisions of "ST STM32G0"
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+ | [[Category:Device families]] |
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− | TBD |
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+ | This article describes device specifics of the ST STM32G0 series devices. |
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+ | The STM32G0 devices are Cortex-M0 based MCUs with low-power functionality. |
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+ | __TOC__ |
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+ | |||
+ | == Flash == |
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+ | The following flash regions are supported by J-Link. |
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+ | {| class="wikitable" |
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+ | |- |
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+ | !colspan="3"| Main flash memory |
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+ | |- |
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+ | ! Device !! Range !! Total size |
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+ | |- |
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+ | | STM32G0xxx4 || 0x0800_0000 - 0x0800_3FFF || 16 KB |
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+ | |- |
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+ | | STM32G0xxx6 || 0x0800_0000 - 0x0800_7FFF || 32 KB |
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+ | |- |
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+ | | STM32G0xxx8 || 0x0800_0000 - 0x0800_FFFF || 64 KB |
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+ | |- |
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+ | | STM32G0xxxB || 0x0800_0000 - 0x0801_FFFF || 128 KB |
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+ | |- |
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+ | | STM32G0xxxC || 0x0800_0000 - 0x0803_FFFF || 256 KB |
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+ | |- |
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+ | | STM32G0xxxE || 0x0800_0000 - 0x0807_FFFF || 512 KB |
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+ | |- |
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+ | !colspan="3"| Option bytes<ref>See: [[#Option_byte_programming | Option byte programming]]</ref> |
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+ | |- |
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+ | | STM32G0x0 || 0x1FFF_7800 - 0x1FFF_785F || 96 bytes |
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+ | |- |
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+ | | STM32G0x1 || 0x1FFF_7800 - 0x1FFF_787F || 128 bytes |
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+ | |} |
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+ | <references/> |
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+ | |||
+ | Currently, only dual-bank mode is supported for internal flash. |
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+ | As a workaround, the device with doubled flash size can be selected if available, e.g. STM32G0B1RE instead of STM32G0B1RC. |
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+ | |||
+ | == Reset == |
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+ | For the STM32G0 devices, the [[J-Link_Reset_Strategies#Type_0:_Normal | Cortex-M default reset strategy]] is used. |
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+ | |||
+ | == Debug specific == |
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+ | Please refer to the [[ST_STM32#Device_specific_connect | generic STM32 article]]. |
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+ | |||
+ | == Option byte programming == |
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+ | Please refer to the [[ST_STM32#Option_bytes | generic STM32 article]]. |
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+ | |||
+ | == Securing/unsecuring the device == |
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+ | Please refer to the [[ST_STM32#MCU_Security | generic STM32 article]]. |
Latest revision as of 12:15, 16 May 2024
This article describes device specifics of the ST STM32G0 series devices. The STM32G0 devices are Cortex-M0 based MCUs with low-power functionality.
Contents
Flash
The following flash regions are supported by J-Link.
Main flash memory | ||
---|---|---|
Device | Range | Total size |
STM32G0xxx4 | 0x0800_0000 - 0x0800_3FFF | 16 KB |
STM32G0xxx6 | 0x0800_0000 - 0x0800_7FFF | 32 KB |
STM32G0xxx8 | 0x0800_0000 - 0x0800_FFFF | 64 KB |
STM32G0xxxB | 0x0800_0000 - 0x0801_FFFF | 128 KB |
STM32G0xxxC | 0x0800_0000 - 0x0803_FFFF | 256 KB |
STM32G0xxxE | 0x0800_0000 - 0x0807_FFFF | 512 KB |
Option bytes[1] | ||
STM32G0x0 | 0x1FFF_7800 - 0x1FFF_785F | 96 bytes |
STM32G0x1 | 0x1FFF_7800 - 0x1FFF_787F | 128 bytes |
- ↑ See: Option byte programming
Currently, only dual-bank mode is supported for internal flash. As a workaround, the device with doubled flash size can be selected if available, e.g. STM32G0B1RE instead of STM32G0B1RC.
Reset
For the STM32G0 devices, the Cortex-M default reset strategy is used.
Debug specific
Please refer to the generic STM32 article.
Option byte programming
Please refer to the generic STM32 article.
Securing/unsecuring the device
Please refer to the generic STM32 article.