Difference between revisions of "TI CC2340"
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The '''TI CC2340''' devices are Cortex-M0 based wireless MCUs. |
The '''TI CC2340''' devices are Cortex-M0 based wireless MCUs. |
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__TOC__ |
__TOC__ |
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! Flash Bank || Base address !! Size || J-Link Support |
! Flash Bank || Base address !! Size || J-Link Support |
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− | | Program Flash || 0x00000000 || 512 KB || style="text-align:center;"| {{YES}} |
+ | | Program Flash || 0x00000000 || up to 512 KB || style="text-align:center;"| {{YES}} |
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|- |
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| CCFG Flash || 0x4E020000 || 2 KB || style="text-align:center;"| {{YES}} |
| CCFG Flash || 0x4E020000 || 2 KB || style="text-align:center;"| {{YES}} |
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*Connecting to a device with valid CCFG block |
*Connecting to a device with valid CCFG block |
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As part of the connect sequence, the J-Link determines the silicon revision: PG1.0 / PG2.0 |
As part of the connect sequence, the J-Link determines the silicon revision: PG1.0 / PG2.0 |
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− | |||
===Reset=== |
===Reset=== |
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The device uses custom reset which performs a reset via the SACI interface: |
The device uses custom reset which performs a reset via the SACI interface: |
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*In case of a valid application is programmed, the MCU will be halted on the reset vector (application entry point). |
*In case of a valid application is programmed, the MCU will be halted on the reset vector (application entry point). |
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*In case of no valid application is programmed, the MCU will be halted in a so called debug loop |
*In case of no valid application is programmed, the MCU will be halted in a so called debug loop |
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+ | ===Disconnect=== |
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+ | xxx |
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==Limitations== |
==Limitations== |
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===Flasher Stand-Alone Mode=== |
===Flasher Stand-Alone Mode=== |
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+ | Supported since software version V7.96n. |
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− | Not supported yet. Support will be implemented soon. |
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+ | |||
===Attach=== |
===Attach=== |
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+ | Attach is supported by the J-Link if not excluded by the current CCFG (e.g. debug disabled after POR / authentication enabled). |
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− | Attach is not supported because a device specific initialization sequence is required. |
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===Security=== |
===Security=== |
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Connecting to a locked device / password authentication is not supported yet. |
Connecting to a locked device / password authentication is not supported yet. |
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+ | ===Flash Breakpoints=== |
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+ | Not supported because re-programming specific sectors is not possible (technical limitation of the device) |
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==Evaluation Boards== |
==Evaluation Boards== |
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− | *TI LP-EM-CC2340R5 |
+ | *[[TI LP-EM-CC2340R5]] |
==Example Application== |
==Example Application== |
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+ | *[[TI LP-EM-CC2340R5#Example Project]] |
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− | *TI LP-EM-CC2340R5 evaluation board: http://wiki.segger.com/TI_LP-EM-CC2340R5#Example_Application |
Latest revision as of 09:05, 21 June 2024
The TI CC2340 devices are Cortex-M0 based wireless MCUs.
Contents
Flash Banks
The TI CC2340 series does not provide a sector erase command but a chip erase command which affects the program flash as well as the CCFG block. Unfortunately, the debug interface is not open in case of an invalid CCFG block is detected which is the case after erasing it. For that reasons, it's mandatory to always program the application + a valid CCFG block when updating the target application.
Internal Flash
Flash Bank | Base address | Size | J-Link Support |
---|---|---|---|
Program Flash | 0x00000000 | up to 512 KB | |
CCFG Flash | 0x4E020000 | 2 KB |
CCFG Flash
The CCFG (Customer Configuration) sector contains configuration data. The boot sequence uses a lot of these configurations. For example whether or not to enable debugging. Where the vector table of the application is located (such that the boot sequence knows where to jump to) The CCFG also contains CRC fields which is used by the boot sequence to check if the CCFG data is valid In general, TI example applications will contain the CCFG data.
As explained above, users have to ensure that the CCFG block is valid in order to guarantee a proper functionality. This means that all application images must include a (valid) CCFG sector.
Device Specific Handling
Connect
A device specific connect sequence is executed which supports:
- Connecting to a device with invalid CCFG block. In this case, a default CCFG will be programmed as part of the connect.
- Connecting to a device with valid CCFG block
As part of the connect sequence, the J-Link determines the silicon revision: PG1.0 / PG2.0
Reset
The device uses custom reset which performs a reset via the SACI interface:
- In case of a valid application is programmed, the MCU will be halted on the reset vector (application entry point).
- In case of no valid application is programmed, the MCU will be halted in a so called debug loop
Disconnect
xxx
Limitations
Flasher Stand-Alone Mode
Supported since software version V7.96n.
Attach
Attach is supported by the J-Link if not excluded by the current CCFG (e.g. debug disabled after POR / authentication enabled).
Security
Connecting to a locked device / password authentication is not supported yet.
Flash Breakpoints
Not supported because re-programming specific sectors is not possible (technical limitation of the device)