Difference between revisions of "Renesas EK-RA6M4"
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== Preparing for J-Link == |
== Preparing for J-Link == |
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− | *Connect the J-Link to |
+ | *Connect the J-Link to this pins: |
+ | {| class="seggertable" |
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− | *Power the board via........ |
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+ | |- |
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+ | ! J-Link Pin || Connector !! Pin || Name |
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+ | |- |
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+ | | VTref || J4 || 1 || +3V3 |
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+ | |- |
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+ | | GND || J4 || 39 || GND |
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+ | |- |
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+ | | TMS/SWDIO || J3 || 3 || P108 |
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+ | |- |
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+ | | TCK/SWCLK || J4 || 38 || P300 |
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+ | |} |
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+ | *Power the board via J11. |
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* Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output should look as follows: |
* Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output should look as follows: |
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− | '''[PICTURE OF CONNECT]''' |
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[[File:Renesas_R7FA6M4AF3_EK-RA6M4_connect.PNG|400px]] |
[[File:Renesas_R7FA6M4AF3_EK-RA6M4_connect.PNG|400px]] |
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Revision as of 14:40, 27 June 2024
This article describes specifics for the Renesas EK-RA6M4 evaluation board.
[PICTURE OF BOARD]
Preparing for J-Link
- Connect the J-Link to this pins:
J-Link Pin | Connector | Pin | Name |
---|---|---|---|
VTref | J4 | 1 | +3V3 |
GND | J4 | 39 | GND |
TMS/SWDIO | J3 | 3 | P108 |
TCK/SWCLK | J4 | 38 | P300 |
- Power the board via J11.
- Verify the Connection with e.g. J-Link Commander. The output should look as follows:
Example Project
The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the Renesas EK-RA6M4.
It is a simple Hello World sample linked into the internal flash.
SETUP
- J-Link software: V6.74
- Embedded Studio: V4.52b
- Hardware: Renesas EK-RA6M4
- Link: File:Renesas R7FA6M4F3 TestProject ES V810b.zip