Difference between revisions of "ST STM32C0"
(One intermediate revision by one other user not shown) | |||
Line 1: | Line 1: | ||
+ | [[Category:Device families]] |
||
__TOC__ |
__TOC__ |
||
The '''ST STM32C0''' series are microcontrollers based on the Arm® |
The '''ST STM32C0''' series are microcontrollers based on the Arm® |
||
Line 9: | Line 10: | ||
! Device || Base address !! Size || J-Link Support |
! Device || Base address !! Size || J-Link Support |
||
|- |
|- |
||
− | | style="text-align:center;"| |
+ | | style="text-align:center;"| STM32C0xxx4 || style="text-align:center;"| 0x08000000|| style="text-align:center;"| 16 KB || style="text-align:center;"| {{YES}} |
|- |
|- |
||
− | | style="text-align:center;"| |
+ | | style="text-align:center;"| STM32C0xxx6 || style="text-align:center;"| 0x08000000|| style="text-align:center;"| 32KB || style="text-align:center;"| {{YES}} |
|} |
|} |
||
Latest revision as of 12:15, 16 May 2024
Contents
The ST STM32C0 series are microcontrollers based on the Arm®
Cortex®-M0+ processor.
Flash Banks
Internal Flash
Device | Base address | Size | J-Link Support |
---|---|---|---|
STM32C0xxx4 | 0x08000000 | 16 KB | |
STM32C0xxx6 | 0x08000000 | 32KB |
Device Specifc Handling
Reset
- The devices uses normal Cortex-M reset, no special handling necessary, like described here.
Evaluation Boards
- ST-STM32C0116-DK evaluation board: https://wiki.segger.com/ST_STM32C0116-DK
Example Application
- ST-STM32C0116-DK evaluation board: https://wiki.segger.com/ST_STM32C0116-DK#Example_Project