Difference between revisions of "GigaDevice GD32450I-EVAL"
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== Preparing for J-Link == |
== Preparing for J-Link == |
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*Connect the J-Link to the JTAG header (JP1) |
*Connect the J-Link to the JTAG header (JP1) |
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− | *Power the board via |
+ | *Power the board via CN2. |
* Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output should look as follows: |
* Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output should look as follows: |
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[[File:GigaDevice_GD32450I-EVAL_GD32F450IK_connect.png|400px]] |
[[File:GigaDevice_GD32450I-EVAL_GD32F450IK_connect.png|400px]] |
Latest revision as of 16:39, 31 May 2024
This article describes specifics for the GigaDevice GD32450I-EVAL evaluation board.
Preparing for J-Link
- Connect the J-Link to the JTAG header (JP1)
- Power the board via CN2.
- Verify the Connection with e.g. J-Link Commander. The output should look as follows:
Example Project
The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the GigaDevice GD32450I-EVAL.
It is a simple Hello World sample linked into the internal flash.
SETUP
- Embedded Studio: V8.10b
- Hardware: GigaDevice GD32450I-EVAL
- Link: File:GigaDevice GD32F450IK TestProject ES V810b.zip