Difference between revisions of "ST STM32U599J-DK"
(→Preparing for J-Link) |
|||
Line 6: | Line 6: | ||
== Preparing for J-Link == |
== Preparing for J-Link == |
||
− | *Connect the J-Link to |
+ | *Connect the J-Link to CN3. |
*Power the board via........ |
*Power the board via........ |
||
* Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output should look as follows: |
* Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output should look as follows: |
Revision as of 13:24, 28 June 2023
This article describes specifics for the ST STM32U599J-DK evaluation board.
Preparing for J-Link
- Connect the J-Link to CN3.
- Power the board via........
- Verify the Connection with e.g. J-Link Commander. The output should look as follows:
Example Project
The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the ST STM32U599J-DK.
It is a simple Hello World sample linked into the internal flash.
SETUP
- J-Link software: V6.74
- Embedded Studio: V4.52b
- Hardware: ST STM32U599J-DK
- Link: File:VENDOR DEVICENAME TestProject ES V452b.zip