Difference between revisions of "GigaDevice GD32105C-EVAL"
(Created page with "__TOC__ This article describes specifics for the GigaDevice GD32105C-EVAL evaluation board.<br> 450px == Preparing f...") |
(→Preparing for J-Link) |
||
Line 6: | Line 6: | ||
== Preparing for J-Link == |
== Preparing for J-Link == |
||
*Connect the J-Link to the JTAG header (JP1) |
*Connect the J-Link to the JTAG header (JP1) |
||
− | *Power the board via |
+ | *Power the board via CN2. |
* Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output should look as follows: |
* Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output should look as follows: |
||
[[File:GigaDevice_GD32105C-EVAL_GD32F105VC_connect.png|400px]] |
[[File:GigaDevice_GD32105C-EVAL_GD32F105VC_connect.png|400px]] |
Revision as of 15:05, 5 April 2024
This article describes specifics for the GigaDevice GD32105C-EVAL evaluation board.
Preparing for J-Link
- Connect the J-Link to the JTAG header (JP1)
- Power the board via CN2.
- Verify the Connection with e.g. J-Link Commander. The output should look as follows:
Example Project
The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the GigaDevice GD32103C-START.
It is a simple Hello World sample linked into the internal flash.
SETUP
- Embedded Studio: V8.10b
- Hardware: GigaDevice GD32103C-START
- Link: File:GigaDevice GD32F105VC TestProject ES V810b.zip