Difference between revisions of "J-Link BASE V11"
(Created page with "This page contains the general, mechanical and electrical specifications as well as an overview of supported soft- and hardware features of the SEGGER '''J-Link BASE V11'''....") |
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|colspan="8"| Hardware Features |
|colspan="8"| Hardware Features |
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− | ! style="text-align:left;"|USB 2.0 Full Speed |
+ | ! style="text-align:left;"|USB 2.0 Full Speed || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|USB 2.0 Hi-Speed |
+ | ! style="text-align:left;"|USB 2.0 Hi-Speed || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|JTAG interface |
+ | ! style="text-align:left;"|JTAG interface || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|cJTAG interface |
+ | ! style="text-align:left;"|cJTAG interface || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|SWD interface |
+ | ! style="text-align:left;"|SWD interface || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|SWO interface |
+ | ! style="text-align:left;"|SWO interface || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|SPI interface |
+ | ! style="text-align:left;"|SPI interface || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|QSPI interface |
+ | ! style="text-align:left;"|QSPI interface || {{NO}} |
− | | [[File:NO.png|20px|link=]] |
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− | ! style="text-align:left;"|Microchip ICSP interface |
+ | ! style="text-align:left;"|Microchip ICSP interface || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|Renesas FINE interface |
+ | ! style="text-align:left;"|Renesas FINE interface || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|SiLabs C2 2-wire interface |
+ | ! style="text-align:left;"|SiLabs C2 2-wire interface || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|ETB Trace ARM7/9 |
+ | ! style="text-align:left;"|ETB Trace ARM7/9 || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|ETB Trace Cortex-M |
+ | ! style="text-align:left;"|ETB Trace Cortex-M || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|ETB Trace Cortex-A/R |
+ | ! style="text-align:left;"|ETB Trace Cortex-A/R || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|ETM Trace Cortex-M |
+ | ! style="text-align:left;"|ETM Trace Cortex-M || {{NO}} |
− | | [[File:NO.png|20px|link=]] |
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− | ! style="text-align:left;"|VCOM |
+ | ! style="text-align:left;"|VCOM || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|Memory Stop mode support |
+ | ! style="text-align:left;"|Memory Stop mode support || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|Cortex-M Monitor Mode debugging |
+ | ! style="text-align:left;"|Cortex-M Monitor Mode debugging || {{NO}} |
− | | [[File:NO.png|20px|link=]] |
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− | ! style="text-align:left;"|SWD Multi-Drop |
+ | ! style="text-align:left;"|SWD Multi-Drop || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|CMSIS-DAP mode |
+ | ! style="text-align:left;"|CMSIS-DAP mode || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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|- style="text-align:center" |
|- style="text-align:center" |
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|colspan="7"| ARM legacy Cores |
|colspan="7"| ARM legacy Cores |
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− | ! style="text-align:left;"|ARM7 |
+ | ! style="text-align:left;"|ARM7 || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|ARM9 |
+ | ! style="text-align:left;"|ARM9 || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|ARM11 |
+ | ! style="text-align:left;"|ARM11 || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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|- style="text-align:center" |
|- style="text-align:center" |
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|colspan="7"| ARM Cortex Cores |
|colspan="7"| ARM Cortex Cores |
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− | ! style="text-align:left;"|Cortex-A5 |
+ | ! style="text-align:left;"|Cortex-A5 || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|Cortex-A7 |
+ | ! style="text-align:left;"|Cortex-A7 || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|Cortex-A8 |
+ | ! style="text-align:left;"|Cortex-A8 || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|Cortex-A9 |
+ | ! style="text-align:left;"|Cortex-A9 || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|Cortex-A12 |
+ | ! style="text-align:left;"|Cortex-A12 || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|Cortex-A15 |
+ | ! style="text-align:left;"|Cortex-A15 || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|Cortex-A17 |
+ | ! style="text-align:left;"|Cortex-A17 || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|Cortex-A53 |
+ | ! style="text-align:left;"|Cortex-A53 || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|Cortex-A57 |
+ | ! style="text-align:left;"|Cortex-A57 || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|Cortex-A72 |
+ | ! style="text-align:left;"|Cortex-A72 || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|Cortex-M0 |
+ | ! style="text-align:left;"|Cortex-M0 || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|Cortex-M0+ |
+ | ! style="text-align:left;"|Cortex-M0+ || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|Cortex-M1 |
+ | ! style="text-align:left;"|Cortex-M1 || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|Cortex-M3 |
+ | ! style="text-align:left;"|Cortex-M3 || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|Cortex-M4 |
+ | ! style="text-align:left;"|Cortex-M4 || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|Cortex-M7 |
+ | ! style="text-align:left;"|Cortex-M7 || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|Cortex-M23 |
+ | ! style="text-align:left;"|Cortex-M23 || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|Cortex-M33 |
+ | ! style="text-align:left;"|Cortex-M33 || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|Cortex-R4 |
+ | ! style="text-align:left;"|Cortex-R4 || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|Cortex-R5 |
+ | ! style="text-align:left;"|Cortex-R5 || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|Cortex-R8 |
+ | ! style="text-align:left;"|Cortex-R8 || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|SC000 (M0 secure) |
+ | ! style="text-align:left;"|SC000 (M0 secure) || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|SC300 (M3 secure) |
+ | ! style="text-align:left;"|SC300 (M3 secure) || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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|- style="text-align:center" |
|- style="text-align:center" |
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|colspan="7"| RISC-V |
|colspan="7"| RISC-V |
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− | ! style="text-align:left;"|RV32 |
+ | ! style="text-align:left;"|RV32 || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|RV64 |
+ | ! style="text-align:left;"|RV64 || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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|- style="text-align:center" |
|- style="text-align:center" |
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|colspan="7"| Microchip PIC32 |
|colspan="7"| Microchip PIC32 |
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− | ! style="text-align:left;"|PIC32MX |
+ | ! style="text-align:left;"|PIC32MX || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|PIC32MZ |
+ | ! style="text-align:left;"|PIC32MZ || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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|- style="text-align:center" |
|- style="text-align:center" |
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|colspan="7"| SiLabs 8051 |
|colspan="7"| SiLabs 8051 |
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− | ! style="text-align:left;"|EFM8 |
+ | ! style="text-align:left;"|EFM8 || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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|- style="text-align:center" |
|- style="text-align:center" |
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|colspan="7"| Renesas RX |
|colspan="7"| Renesas RX |
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− | ! style="text-align:left;"|RX110 |
+ | ! style="text-align:left;"|RX110 || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|RX111 |
+ | ! style="text-align:left;"|RX111 || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|RX210 |
+ | ! style="text-align:left;"|RX210 || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|RX21A |
+ | ! style="text-align:left;"|RX21A || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|RX220 |
+ | ! style="text-align:left;"|RX220 || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|RX610 |
+ | ! style="text-align:left;"|RX610 || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|RX621 |
+ | ! style="text-align:left;"|RX621 || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|RX62G |
+ | ! style="text-align:left;"|RX62G || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|RX62G |
+ | ! style="text-align:left;"|RX62G || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|RX62N |
+ | ! style="text-align:left;"|RX62N || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|RX62T |
+ | ! style="text-align:left;"|RX62T || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|RX630 |
+ | ! style="text-align:left;"|RX630 || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|RX631 |
+ | ! style="text-align:left;"|RX631 || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|RX63N |
+ | ! style="text-align:left;"|RX63N || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|RX63T |
+ | ! style="text-align:left;"|RX63T || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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− | ! style="text-align:left;"|RX64M |
+ | ! style="text-align:left;"|RX64M || {{YES}} |
− | | [[File:YES.png|20px|link=]] |
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Revision as of 18:35, 9 December 2021
This page contains the general, mechanical and electrical specifications as well as an overview of supported soft- and hardware features of the SEGGER J-Link BASE V11.
Contents
Hardware and Software Features
Hardware version | 11 | ||||||
---|---|---|---|---|---|---|---|
Hardware Features | |||||||
USB 2.0 Full Speed | |||||||
USB 2.0 Hi-Speed | |||||||
JTAG interface | |||||||
cJTAG interface | |||||||
SWD interface | |||||||
SWO interface | |||||||
SPI interface | |||||||
QSPI interface | |||||||
Microchip ICSP interface | |||||||
Renesas FINE interface | |||||||
SiLabs C2 2-wire interface | |||||||
ETB Trace ARM7/9 | |||||||
ETB Trace Cortex-M | |||||||
ETB Trace Cortex-A/R | |||||||
ETM Trace Cortex-M | |||||||
VCOM | |||||||
Memory Stop mode support | |||||||
Cortex-M Monitor Mode debugging | |||||||
SWD Multi-Drop | |||||||
CMSIS-DAP mode | |||||||
ARM legacy Cores | |||||||
ARM7 | |||||||
ARM9 | |||||||
ARM11 | |||||||
ARM Cortex Cores | |||||||
Cortex-A5 | |||||||
Cortex-A7 | |||||||
Cortex-A8 | |||||||
Cortex-A9 | |||||||
Cortex-A12 | |||||||
Cortex-A15 | |||||||
Cortex-A17 | |||||||
Cortex-A53 | |||||||
Cortex-A57 | |||||||
Cortex-A72 | |||||||
Cortex-M0 | |||||||
Cortex-M0+ | |||||||
Cortex-M1 | |||||||
Cortex-M3 | |||||||
Cortex-M4 | |||||||
Cortex-M7 | |||||||
Cortex-M23 | |||||||
Cortex-M33 | |||||||
Cortex-R4 | |||||||
Cortex-R5 | |||||||
Cortex-R8 | |||||||
SC000 (M0 secure) | |||||||
SC300 (M3 secure) | |||||||
RISC-V | |||||||
RV32 | |||||||
RV64 | |||||||
Microchip PIC32 | |||||||
PIC32MX | |||||||
PIC32MZ | |||||||
SiLabs 8051 | |||||||
EFM8 | |||||||
Renesas RX | |||||||
RX110 | |||||||
RX111 | |||||||
RX210 | |||||||
RX21A | |||||||
RX220 | |||||||
RX610 | |||||||
RX621 | |||||||
RX62G | |||||||
RX62G | |||||||
RX62N | |||||||
RX62T | |||||||
RX630 | |||||||
RX631 | |||||||
RX63N | |||||||
RX63T | |||||||
RX64M |