Difference between revisions of "ST STM32F1"
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+ | This article describes device specifics of the ST STM32F1 series devices. |
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+ | The STM32F1 devices are Cortex-M3 based MCUs with low-power functionality. |
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__TOC__ |
__TOC__ |
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+ | == Internal Flash == |
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− | This article describes device specifics of the ST STM32F1 series devices. |
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+ | The internal flash is divided into 2 different regions: |
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+ | {| class="seggertable" |
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+ | |- |
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+ | ! Device !! Range !! Total size |
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+ | |- |
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+ | | STM32F0xxx4 || 0x0800_0000 - 0x0800_3FFF || 16 KB |
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+ | |- |
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+ | | STM32F0xxx6 || 0x0800_0000 - 0x0800_7FFF || 32 KB |
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+ | |- |
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+ | | STM32F0xxx8 || 0x0800_0000 - 0x0800_FFFF || 64 KB |
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+ | |- |
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+ | | STM32F0xxxB || 0x0800_0000 - 0x0801_FFFF || 128 KB |
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+ | |- |
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+ | | STM32F0xxxC || 0x0800_0000 - 0x0803_FFFF || 256 KB |
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+ | |- |
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+ | | STM32F0xxxD || 0x0800_0000 - 0x0805_FFFF || 384 KB |
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+ | |- |
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+ | | STM32F0xxxE || 0x0800_0000 - 0x0807_FFFF || 512 KB |
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+ | |- |
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+ | | All || 0x1FFF_F800 - 0x1FFF_F80F || 16 bytes |
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+ | |} |
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+ | |||
+ | == Reset == |
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+ | For the STM32F0 devices, the [[J-Link_Reset_Strategies#Type_0:_Normal | Cortex-M default reset strategy]] is used. |
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+ | |||
+ | == Debug specific == |
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+ | * If no connection can be established the J-Link will try to connect to the device via a connect under reset. |
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+ | * On connect, some DBGMCU registers will be written to |
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+ | ** freeze the watchdogs during halt to prevent unintended resets while debugging. |
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+ | ** prevent the debug connection from breaking after the CPU enters deepsleep. |
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+ | * When closing the J-Link connection, the DBGMCU registers are reset. |
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+ | |||
== Option Byte Programming in J-Flash == |
== Option Byte Programming in J-Flash == |
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J-Flash supports programming of the option bytes for STM32 devices. In order to program the option bytes simply choose the appropriate Device, which allows option byte programming, in the CPU settings tab (e.g. STM32F103ZE (allow opt. bytes) ). J-Flash will allow programming a virtual 16-byte sector at address 0x06000000 which represents the 8 option bytes and their complements. You do not have to care about the option bytes complements since they are computated automatically. The following table describes the structure of the option bytes sector: |
J-Flash supports programming of the option bytes for STM32 devices. In order to program the option bytes simply choose the appropriate Device, which allows option byte programming, in the CPU settings tab (e.g. STM32F103ZE (allow opt. bytes) ). J-Flash will allow programming a virtual 16-byte sector at address 0x06000000 which represents the 8 option bytes and their complements. You do not have to care about the option bytes complements since they are computated automatically. The following table describes the structure of the option bytes sector: |
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device unprotected your option byte sector (at addr 0x06000000) should look like as |
device unprotected your option byte sector (at addr 0x06000000) should look like as |
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follows: |
follows: |
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− | {| class=" |
+ | {| class="seggertable" |
|- |
|- |
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! Address !! [31:24] !! [23:16] !! [15:08] !! [07:00] |
! Address !! [31:24] !! [23:16] !! [15:08] !! [07:00] |
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The hardware watchdog of a STM32F10x device can be enabled by programming the option bytes. If the hardware watchdog is enabled the device is reset periodically if the watchdog timer is not refreshed and reaches 0. If the hardware watchdog is enabled by an application which is located in flash and which does not refresh the watchdog timer, the device can not be debugged anymore. |
The hardware watchdog of a STM32F10x device can be enabled by programming the option bytes. If the hardware watchdog is enabled the device is reset periodically if the watchdog timer is not refreshed and reaches 0. If the hardware watchdog is enabled by an application which is located in flash and which does not refresh the watchdog timer, the device can not be debugged anymore. |
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− | + | === Disabling the hardware watchdog === |
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− | |||
In order to disable the hardware watchdog the option bytes have to be re-programmed. SEGGER offers a free command line tool which reprograms the option bytes in order to disable the hardware watchdog. For more information about the STM32 commander, please refer to the J-Link User Manual (UM08001). |
In order to disable the hardware watchdog the option bytes have to be re-programmed. SEGGER offers a free command line tool which reprograms the option bytes in order to disable the hardware watchdog. For more information about the STM32 commander, please refer to the J-Link User Manual (UM08001). |
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− | |||
− | == Debugging with software watchdog enabled == |
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− | If the device shall be debugged with one of the software watchdogs (independed watchdog / window watchdog) enabled, there is an additional init step necessary to make the watchdog counter stop when the CPU is halted by the debugger. This is configured in the DBGMCU_CR register. The following sequence can be used to enable debugging with software watchdogs enabled: |
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− | // |
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− | // Configure both watchdog timers to be halted if the CPU is halted by the debugger |
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− | // |
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− | *((volatile int *)(0xE0042004)) |= (1 << 8) | (1 << 9); |
Revision as of 12:00, 21 November 2022
This article describes device specifics of the ST STM32F1 series devices. The STM32F1 devices are Cortex-M3 based MCUs with low-power functionality.
Contents
Internal Flash
The internal flash is divided into 2 different regions:
Device | Range | Total size |
---|---|---|
STM32F0xxx4 | 0x0800_0000 - 0x0800_3FFF | 16 KB |
STM32F0xxx6 | 0x0800_0000 - 0x0800_7FFF | 32 KB |
STM32F0xxx8 | 0x0800_0000 - 0x0800_FFFF | 64 KB |
STM32F0xxxB | 0x0800_0000 - 0x0801_FFFF | 128 KB |
STM32F0xxxC | 0x0800_0000 - 0x0803_FFFF | 256 KB |
STM32F0xxxD | 0x0800_0000 - 0x0805_FFFF | 384 KB |
STM32F0xxxE | 0x0800_0000 - 0x0807_FFFF | 512 KB |
All | 0x1FFF_F800 - 0x1FFF_F80F | 16 bytes |
Reset
For the STM32F0 devices, the Cortex-M default reset strategy is used.
Debug specific
- If no connection can be established the J-Link will try to connect to the device via a connect under reset.
- On connect, some DBGMCU registers will be written to
- freeze the watchdogs during halt to prevent unintended resets while debugging.
- prevent the debug connection from breaking after the CPU enters deepsleep.
- When closing the J-Link connection, the DBGMCU registers are reset.
Option Byte Programming in J-Flash
J-Flash supports programming of the option bytes for STM32 devices. In order to program the option bytes simply choose the appropriate Device, which allows option byte programming, in the CPU settings tab (e.g. STM32F103ZE (allow opt. bytes) ). J-Flash will allow programming a virtual 16-byte sector at address 0x06000000 which represents the 8 option bytes and their complements. You do not have to care about the option bytes complements since they are computated automatically. The following table describes the structure of the option bytes sector:
Address | [31:24] | [23:16] | [15:08] | [07:00] |
---|---|---|---|---|
0x06000000 | complement | Option byte 1 | complement | Option byte 0 |
0x06000004 | complement | Option byte 3 | complement | Option byte 2 |
0x06000008 | complement | Option byte 5 | complement | Option byte 4 |
0x0600000C | complement | Option byte 7 | complement | Option byte 6 |
- Writing a value of 0xFF inside option byte 0 will read-protect the STM32. In order to keep the device unprotected you have to write the key value 0xA5 into option byte 0.
- The address 0x06000000 is a virtual address only. The option bytes are originally located at address 0x1FFFF800. The remap from 0x06000000 to 0x1FFFF800 is done automatically by J-Flash.
Example
To program the option bytes 2 and 3 with the values 0xAA and 0xBB, but leave the device unprotected your option byte sector (at addr 0x06000000) should look like as follows:
Address | [31:24] | [23:16] | [15:08] | [07:00] |
---|---|---|---|---|
0x06000000 | 0x00 | 0xFF | 0x5A | 0xA5 |
0x06000004 | 0x44 | 0xBB | 0x55 | 0xAA |
0x06000008 | 0x00 | 0xFF | 0x00 | 0xFF |
0x0600000C | 0x00 | 0xFF | 0x00 | 0xFF |
For a detailed description of each option byte, please refer to ST programming manual PM0042, section "Option byte description".
Securing/unsecuring the device
Please refer to the related article here.
Hardware watchdog
The hardware watchdog of a STM32F10x device can be enabled by programming the option bytes. If the hardware watchdog is enabled the device is reset periodically if the watchdog timer is not refreshed and reaches 0. If the hardware watchdog is enabled by an application which is located in flash and which does not refresh the watchdog timer, the device can not be debugged anymore.
Disabling the hardware watchdog
In order to disable the hardware watchdog the option bytes have to be re-programmed. SEGGER offers a free command line tool which reprograms the option bytes in order to disable the hardware watchdog. For more information about the STM32 commander, please refer to the J-Link User Manual (UM08001).