Difference between revisions of "NXP CTN73x"
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! Flash Bank || Base address !! Size || J-Link Support |
! Flash Bank || Base address !! Size || J-Link Support |
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| − | | Internal Flash || 0x00203000 || |
+ | | Internal Flash || 0x00203000 || 158 KB || style="text-align:center;"| {{YES}} |
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| EEPROM || 0x00201200|| 3584 B || style="text-align:center;"| {{YES}} |
| EEPROM || 0x00201200|| 3584 B || style="text-align:center;"| {{YES}} |
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Revision as of 15:13, 20 September 2023
The NXP CTN73x family is a family of 32-bit Arm Cortex-M0-based NFC microcontrollers.
Contents
Flash Banks
Internal Flash
| Flash Bank | Base address | Size | J-Link Support |
|---|---|---|---|
| Internal Flash | 0x00203000 | 158 KB | 
|
| EEPROM | 0x00201200 | 3584 B |
|
Watchdog Handling
- The device has a watchdog timer [WDT].
- The watchdog is not fed during flash programming.
Device Specific Handling
Reset
- The device uses custom reset which halts the CPU after Boot ROM execution.
Attach
Attach is supported.
Evaluation Boards
- NXP PN640 Performance evaluation board: http://wiki.segger.com/NXP_PN640_Perf_Board
Example Application
- NXP PN640 Performance evaluation board: http://wiki.segger.com/NXP_PN640_Perf_Board#Example_Project
