Silicon Labs EFR32xG25
Revision as of 11:17, 5 June 2023 by Torben.scharping (talk | contribs)
The Silicon Labs EFR32xG25 are wireless SoCs based on Cortex-M33 microcontrollers.
Contents
Flash Banks
Internal Flash
Flash Bank | Base address | Size | J-Link Support |
---|---|---|---|
Internal flash | 0x08000000 | Up to 1920 KB | |
User Data | 0x0FE00000 | 1 KB |
Watchdog Handling
- The device does not have a watchdog.
- The device has a watchdog [WATCHDOGNAME].
- The watchdog is fed during flash programming.
- If the watchdog is enabled, it is turned off during flash programming and turned back on afterwards.
Device Specific Handling
Connect
Reset
- The devices uses normal Cortex-M reset, no special handling necessary, like described here.
- The devices uses Cortex-M Core reset, no special handling necessary, like described here.
- The devices uses Cortex-M Rest Pin, no special handling necessary, like described here.
- The device uses custom reset:.....
Attach
Attach is not supported by default because the J-Link initializes certain RAM regions by default.
Security
Evaluation Boards
- [SiliconVendor] [EvalBoardName] evaluation board: http://techwiki.segger.local/WikiTemplateEvalBoard
Example Application
- [SiliconVendor] [EvalBoardName] evaluation board: http://techwiki.segger.local/WikiTemplateEvalBoard#Example_Project