Difference between revisions of "ArteryTek AT-START-F402"

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(Created page with "__TOC__ This article describes specifics for the Artery AT-START-F405 evaluation board.<br> 450px == Preparing for J-Li...")
 
m (Torben.scharping moved page Artery AT-START-F402 to ArteryTek AT-START-F402)
 
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__TOC__
 
__TOC__
This article describes specifics for the Artery AT-START-F405 evaluation board.<br>
+
This article describes specifics for the ArteryTek AT-START-F402 evaluation board.<br>
[[File:Artery_AT-START-F405_AT32F405RCT7-7_board.jpg|450px]]
+
[[File:Artery_AT-START-F402_AT32F402RCT7-7_board.jpg|450px]]
   
 
== Preparing for J-Link ==
 
== Preparing for J-Link ==
Line 21: Line 21:
 
| TDO/SWO || J1 || 23 || PB3
 
| TDO/SWO || J1 || 23 || PB3
 
|-
 
|-
| RESET || J2 || 7 || NRST
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| RESET || J2 || 9 || NRST
 
|}
 
|}
*Power the board via USB CN6 or CN4.
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*Power the board via USB CN3.
 
* Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output should look as follows:
 
* Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output should look as follows:
[[File:Artery_AT-START-F405_AT32F405RCT7-7_connect.png|400px]]
+
[[File:Artery_AT-START-F401_AT32F401RCT7-7_connect.png|400px]]
 
 
== Example Project==
 
== Example Project==
The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the Artery AT-START-F405.<br>
+
The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the ArteryTek AT-START-F402.<br>
 
It is a simple Hello World sample linked into the internal flash.<br>
 
It is a simple Hello World sample linked into the internal flash.<br>
 
====SETUP====
 
====SETUP====
*J-Link software: V7.94g
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*J-Link software: V7.94h
 
*Embedded Studio: V7.20
 
*Embedded Studio: V7.20
*Hardware: Artery AT-START-F405
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*Hardware: Artery AT-START-F402
*Link: [[File:Artery_AT-START-F405_AT32F405RCT7-7_TestProject_ES_7V20.zip]]
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*Link: [[File:Artery_AT-START-F402_AT32F402RCT7-7_TestProject_ES_7V20.zip]]

Latest revision as of 16:32, 8 February 2024

This article describes specifics for the ArteryTek AT-START-F402 evaluation board.
Artery AT-START-F402 AT32F402RCT7-7 board.jpg

Preparing for J-Link

  • Connect the J-Link to this pins:
J-Link Pin Connector Pin Name
VTref J1 32 VDD
GND J1 31 GND
TDI J1 18 PA15
TMS/SWDIO J1 14 PA13/SWDIO
TCK/SWCLK J1 17 PA14/SWCLK
TDO/SWO J1 23 PB3
RESET J2 9 NRST
  • Power the board via USB CN3.
  • Verify the Connection with e.g. J-Link Commander. The output should look as follows:

Artery AT-START-F401 AT32F401RCT7-7 connect.png

Example Project

The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the ArteryTek AT-START-F402.
It is a simple Hello World sample linked into the internal flash.

SETUP