Difference between revisions of "ArteryTek AT-START-F403A"
(Created page with "__TOC__ This article describes specifics for the Artery AT-START-F403 evaluation board.<br> 450px == Preparing for J-Li...") |
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__TOC__ |
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− | This article describes specifics for the Artery AT-START- |
+ | This article describes specifics for the Artery AT-START-F403A evaluation board.<br> |
− | [[File:Artery_AT-START- |
+ | [[File:Artery_AT-START-F403A_AT32F403AVGT7_board.jpg|450px]] |
== Preparing for J-Link == |
== Preparing for J-Link == |
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*Power the board via CN4. |
*Power the board via CN4. |
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* Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output should look as follows: |
* Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output should look as follows: |
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− | [[File:Artery_AT-START- |
+ | [[File:Artery_AT-START-F403A_AT32F403AVGT7_connect.png|400px]] |
== Example Project== |
== Example Project== |
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− | The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the Artery AT-START- |
+ | The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the Artery AT-START-F403A.<br> |
It is a simple Hello World sample linked into the internal flash.<br> |
It is a simple Hello World sample linked into the internal flash.<br> |
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====SETUP==== |
====SETUP==== |
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*J-Link software: V7.94i |
*J-Link software: V7.94i |
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*Embedded Studio: V7.20 |
*Embedded Studio: V7.20 |
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− | *Hardware: Artery AT-START- |
+ | *Hardware: Artery AT-START-F403A |
− | *Link: [[File:Artery_AT-START- |
+ | *Link: [[File:Artery_AT-START-F403A_AT32F403AVGT7_TestProject_ES_7V20.zip]] |
Revision as of 15:35, 7 February 2024
This article describes specifics for the Artery AT-START-F403A evaluation board.
Preparing for J-Link
- Connect the J-Link to this pins:
J-Link Pin | Connector | Pin | Name |
---|---|---|---|
VTref | J1 | 72 | VDD |
GND | J1 | 71 | GND |
TDI | J1 | 71 | GND |
TMS/SWDIO | J1 | 33 | PA13/SWDIO |
TCK/SWCLK | J1 | 37 | PA14/SWCLK |
TDO/SWO | J1 | 61 | PB3 |
RESET | J1 | 25 | NRST |
- Power the board via CN4.
- Verify the Connection with e.g. J-Link Commander. The output should look as follows:
Example Project
The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the Artery AT-START-F403A.
It is a simple Hello World sample linked into the internal flash.
SETUP
- J-Link software: V7.94i
- Embedded Studio: V7.20
- Hardware: Artery AT-START-F403A
- Link: File:Artery AT-START-F403A AT32F403AVGT7 TestProject ES 7V20.zip