Difference between revisions of "ArteryTek AT-START-F403A"

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(SETUP)
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__TOC__
 
__TOC__
   
This article describes specifics for the Artery AT-START-F403A evaluation board.<br>
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This article describes specifics for the ArteryTek AT-START-F403A evaluation board.<br>
 
[[File:Artery_AT-START-F403A_AT32F403AVGT7_board.jpg|450px]]
 
[[File:Artery_AT-START-F403A_AT32F403AVGT7_board.jpg|450px]]
   
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== Example Project==
 
== Example Project==
The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the Artery AT-START-F403A.<br>
+
The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the ArteryTek AT-START-F403A.<br>
 
It is a simple Hello World sample linked into the internal flash.<br>
 
It is a simple Hello World sample linked into the internal flash.<br>
 
====SETUP====
 
====SETUP====
 
*J-Link software: V7.94j
 
*J-Link software: V7.94j
 
*Embedded Studio: V7.20
 
*Embedded Studio: V7.20
*Hardware: Artery AT-START-F403A
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*Hardware: ArteryTek AT-START-F403A
 
*Link: [[File:Artery_AT-START-F403A_AT32F403AVGT7_TestProject_ES_7V20.zip]]
 
*Link: [[File:Artery_AT-START-F403A_AT32F403AVGT7_TestProject_ES_7V20.zip]]

Revision as of 16:32, 8 February 2024

This article describes specifics for the ArteryTek AT-START-F403A evaluation board.
Artery AT-START-F403A AT32F403AVGT7 board.jpg

Preparing for J-Link

  • Connect the J-Link to this pins:
J-Link Pin Connector Pin Name
VTref J1 23 VDD
GND J1 22 GND
TDI J1 25 PA15
TMS/SWDIO J1 20 PA13
TCK/SWCLK J1 24 PA14
TDO/SWO J1 37 PB3
RESET J2 14 NRST
  • Power the board via CN4.
  • Verify the Connection with e.g. J-Link Commander. The output should look as follows:

Artery AT-START-F403A AT32F403AVGT7 connect.png

Example Project

The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the ArteryTek AT-START-F403A.
It is a simple Hello World sample linked into the internal flash.

SETUP