Difference between revisions of "ArteryTek AT-START-F415"
(→Preparing for J-Link) |
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| Line 13: | Line 13: | ||
| GND || J1 || 31 || GND |
| GND || J1 || 31 || GND |
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| − | | TDI || J1 || |
+ | | TDI || J1 || 18|| PA15 |
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| − | | TMS/SWDIO || J1 || 14 || PA13 |
+ | | TMS/SWDIO || J1 || 14 || PA13 |
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| − | | TCK/SWCLK || J1 || 17 || PA14 |
+ | | TCK/SWCLK || J1 || 17 || PA14 |
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| TDO/SWO || J1 || 23 || PB3 |
| TDO/SWO || J1 || 23 || PB3 |
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Revision as of 15:48, 23 January 2024
This article describes specifics for the Artery AT-START-F415 evaluation board.
Preparing for J-Link
- Connect the J-Link to this pins:
| J-Link Pin | Connector | Pin | Name |
|---|---|---|---|
| VTref | J1 | 32 | VDD |
| GND | J1 | 31 | GND |
| TDI | J1 | 18 | PA15 |
| TMS/SWDIO | J1 | 14 | PA13 |
| TCK/SWCLK | J1 | 17 | PA14 |
| TDO/SWO | J1 | 23 | PB3 |
| RESET | J2 | 7 | NRST |
- Power the board via USB CN6.
- Verify the Connection with e.g. J-Link Commander. The output should look as follows:
Example Project
The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the Artery AT-START-F415.
It is a simple Hello World sample linked into the internal flash.
SETUP
- J-Link software: V7.94g
- Embedded Studio: V7.20
- Hardware: Artery AT-START-F415
- Link: File:Artery AT-START-F415 AT32F415RCT7-7 TestProject ES 7V20.zip
