Difference between revisions of "ArteryTek AT-START-F437"
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__TOC__ |
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− | This article describes specifics for the |
+ | This article describes specifics for the ArteryTek AT-START-F437 evaluation board.<br> |
+ | [[File:Artery_AT-START-F437_AT32F437ZMT7_board.jpg|450px]] |
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− | '''[PICTURE OF BOARD]''' |
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− | [[File:VENDOR_BOARDNAME.jpg|450px]] |
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== Preparing for J-Link == |
== Preparing for J-Link == |
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*Power the board via USB (CN2 or CN3). |
*Power the board via USB (CN2 or CN3). |
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* Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output should look as follows: |
* Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output should look as follows: |
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+ | [[File:Artery_AT-START-F437_AT32F437ZMT7_connect.png|400px]] |
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− | '''[PICTURE OF CONNECT]''' |
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− | [[File:VENDOR_DEVICE_CONNECT.PNG|400px]] |
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== Example Project== |
== Example Project== |
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− | The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the |
+ | The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the ArteryTek AT-START-F437.<br> |
It is a simple Hello World sample linked into the internal flash.<br> |
It is a simple Hello World sample linked into the internal flash.<br> |
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====SETUP==== |
====SETUP==== |
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*J-Link software: V7.94g |
*J-Link software: V7.94g |
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*Embedded Studio: V7.20 |
*Embedded Studio: V7.20 |
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− | *Hardware: |
+ | *Hardware: ArteryTek AT-START-F437 |
− | *Link: [[File: |
+ | *Link: [[File:Artery_AT-START-F437_AT32F437ZMT7_TestProject_ES_7V20.zip]] |
Latest revision as of 16:42, 8 February 2024
This article describes specifics for the ArteryTek AT-START-F437 evaluation board.
Preparing for J-Link
- Connect the J-Link to this pins:
J-Link Pin | Connector | Pin | Name |
---|---|---|---|
VTref | J1 | 72 | VDD |
GND | J1 | 71 | GND |
TMS/SWDIO | J1 | 33 | PA13/SWDIO |
TCK/SWCLK | J1 | 37 | PA14/SWCLK |
TDO/SWO | J1 | 61 | PB3 |
RESET | J1 | 25 | NRST |
- Power the board via USB (CN2 or CN3).
- Verify the Connection with e.g. J-Link Commander. The output should look as follows:
Example Project
The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the ArteryTek AT-START-F437.
It is a simple Hello World sample linked into the internal flash.
SETUP
- J-Link software: V7.94g
- Embedded Studio: V7.20
- Hardware: ArteryTek AT-START-F437
- Link: File:Artery AT-START-F437 AT32F437ZMT7 TestProject ES 7V20.zip