ArteryTek AT-START-F437
Revision as of 11:49, 18 January 2024 by Torben.scharping (talk | contribs) (Created page with "__TOC__ This article describes specifics for the [SiliconVendor] [EvalBoardName] evaluation board.<br> '''[PICTURE OF BOARD]''' 450px == Prepar...")
This article describes specifics for the [SiliconVendor] [EvalBoardName] evaluation board.
[PICTURE OF BOARD]
450px
Preparing for J-Link
- Connect the J-Link to ......
- Connect the J-Link to this pins:
| J-Link Pin | Connector | Pin | Name |
|---|---|---|---|
| VTref | |||
| GND | |||
| nTRST | |||
| TDI | |||
| TMS/SWDIO | |||
| TCK/SWCLK | |||
| RTCK | |||
| TDO/SWO | |||
| RESET | |||
| DBGRQ | |||
| 5V-Supply |
- Power the board via........
- Verify the Connection with e.g. J-Link Commander. The output should look as follows:
[PICTURE OF CONNECT]
Example Project
The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the [SiliconVendor] [EvalBoardName].
It is a simple Hello World sample linked into the internal flash.
SETUP
- J-Link software: V7.xx
- Embedded Studio: V7.20
- Hardware: [SiliconVendor] [EvalBoardName]
- Link: File:VENDOR DEVICENAME TestProject ES V452b.zip
