Difference between revisions of "ArteryTek AT-START-WB415"
(Created page with "__TOC__ This article describes specifics for the Artery AT-START-WB413 evaluation board.<br> 450px == Preparing for J...") |
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__TOC__ |
__TOC__ |
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| − | This article describes specifics for the |
+ | This article describes specifics for the ArteryTek AT-START-WB415 evaluation board.<br> |
| − | [[File:Artery_AT-START- |
+ | [[File:Artery_AT-START-WB415_AT32WB415CCU7-7_board.jpg|450px]] |
== Preparing for J-Link == |
== Preparing for J-Link == |
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| Line 9: | Line 9: | ||
! J-Link Pin || Connector !! Pin || Name |
! J-Link Pin || Connector !! Pin || Name |
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|- |
|- |
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| − | | VTref || J1 || |
+ | | VTref || J1 || 22 || VDD |
|- |
|- |
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| − | | GND || J1 || |
+ | | GND || J1 || 24 || GND |
|- |
|- |
||
| − | | |
+ | | TMS/SWDIO || J2 || 10 || PA13/SWDIO |
|- |
|- |
||
| − | | |
+ | | TCK/SWCLK || J2 || 11 || PA14/SWCLK |
|- |
|- |
||
| − | | |
+ | | RESET || J2 || 24 || MCU_NRST |
| − | |- |
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| − | | TDO/SWO || J1 || 23 || PB3 |
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| − | |- |
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| − | | RESET || J2 || 7 || NRST |
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|} |
|} |
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*Power the board via USB CN6. |
*Power the board via USB CN6. |
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* Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output should look as follows: |
* Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output should look as follows: |
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| − | [[File:Artery_AT-START- |
+ | [[File:Artery_AT-START-WB415_AT32WB415CCU7-7_connect.png|400px]] |
== Example Project== |
== Example Project== |
||
| − | The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the |
+ | The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the ArteryTek AT-START-WB415.<br> |
It is a simple Hello World sample linked into the internal flash.<br> |
It is a simple Hello World sample linked into the internal flash.<br> |
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====SETUP==== |
====SETUP==== |
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*J-Link software: V7.94i |
*J-Link software: V7.94i |
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*Embedded Studio: V7.20 |
*Embedded Studio: V7.20 |
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| − | *Hardware: |
+ | *Hardware: ArteryTek AT-START-WB415 |
| − | *Link: [[File:Artery_AT-START- |
+ | *Link: [[File:Artery_AT-START-WB415_AT32WB415CCU7-7_TestProject_ES_7V20.zip]] |
Latest revision as of 16:44, 8 February 2024
This article describes specifics for the ArteryTek AT-START-WB415 evaluation board.
450px
Preparing for J-Link
- Connect the J-Link to this pins:
| J-Link Pin | Connector | Pin | Name |
|---|---|---|---|
| VTref | J1 | 22 | VDD |
| GND | J1 | 24 | GND |
| TMS/SWDIO | J2 | 10 | PA13/SWDIO |
| TCK/SWCLK | J2 | 11 | PA14/SWCLK |
| RESET | J2 | 24 | MCU_NRST |
- Power the board via USB CN6.
- Verify the Connection with e.g. J-Link Commander. The output should look as follows:
Example Project
The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the ArteryTek AT-START-WB415.
It is a simple Hello World sample linked into the internal flash.
SETUP
- J-Link software: V7.94i
- Embedded Studio: V7.20
- Hardware: ArteryTek AT-START-WB415
- Link: File:Artery AT-START-WB415 AT32WB415CCU7-7 TestProject ES 7V20.zip
