ArteryTek AT32A40x
Revision as of 16:30, 8 February 2024 by Torben.scharping (talk | contribs)
ArteryTek AT32A40x are Cortex-M4 based MCUs
Contents
Flash Banks
Internal Flash
| Flash Bank | Base address | Size | J-Link Support |
|---|---|---|---|
| Internal flash | 0x08000000 | 1024KB | 
|
| SPIM external flash | 0x08400000 | Up to 16 MB | 
|
The SPIM support is currently under development.
Watchdog Handling
- The watchdog is fed during flash programming.
Device Specific Handling
Reset
- The device uses normal Cortex-M reset, no special handling necessary, like described here.
