Difference between revisions of "ArteryTek AT32F42x"

From SEGGER Wiki
Jump to: navigation, search
(Example Application)
(Evaluation Boards)
Line 19: Line 19:
   
 
==Evaluation Boards==
 
==Evaluation Boards==
  +
*[[Artery_AT-START-F421|Artery AT-START-F421]]
 
*[[Artery_AT-START-F425|Artery AT-START-F425]]
 
*[[Artery_AT-START-F425|Artery AT-START-F425]]
 
   
 
==Example Application==
 
==Example Application==

Revision as of 18:57, 22 January 2024

Artery AT32F42x are Cortex-M4 based MCUs

Flash Banks

Internal Flash

Flash Bank Base address Size J-Link Support
Internal flash 0x08000000 Up to 64 KB YES.png

Watchdog Handling

  • The watchdog is fed during flash programming.

Device Specific Handling

Reset

  • The device uses normal Cortex-M reset, no special handling necessary, like described here.

Evaluation Boards

Example Application