Difference between revisions of "ArteryTek AT32WB41x"

Latest revision as of 12:59, 18 March 2024

ArteryTek AT32WB41x are Cortex-M4 based MCUs

Flash Bank	Base address	Size	J-Link Support
Internal flash	0x08000000	256 KB
User data	0x1FFFF800	1 KB

On Connect, protection level is checked. For further information regarding this, please click here.

The device uses normal Cortex-M reset, no special handling necessary, like described here.

@@ Line 1: / Line 1: @@
-Artery AT32WB413 are Cortex-M4 based MCUs
+ArteryTek AT32WB41x are Cortex-M4 based MCUs
 __TOC__
@@ Line 8: / Line 8: @@
 ! Flash Bank || Base address !! Size || J-Link Support
 |-
-| Internal flash || 0x08000000 || Up to 256 KB || style="text-align:center;"| {{YES}}
+| Internal flash || 0x08000000 || 256 KB || style="text-align:center;"| {{YES}}
+|-
+| User data  || 0x1FFFF800 || 1 KB || style="text-align:center;"| {{YES}}
 |}
@@ Line 15: / Line 17: @@
 ==Device Specific Handling==
+===Connect===
+*On Connect, protection level is checked. For further information regarding this, please click [[ArteryTek_AT32| here]].
 ===Reset===
 *The device uses normal Cortex-M reset, no special handling necessary, like described [[J-Link_Reset_Strategies#Type_0:_Normal | here]].
 ==Evaluation Boards==
-*[[Artery_AT-START-WB413|Artery AT-START-WB413]]
+*[[ArteryTek_AT-START-WB415|ArteryTek AT-START-WB415]]1
 ==Example Application==
-*[[Artery_AT-START-WB413#Example_Project|Artery AT-START-WB413]]
+*[[ArteryTek_AT-START-WB415#Example_Project|ArteryTek AT-START-WB415]]