Difference between revisions of "Codasip L10"

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(Created page with "The Codasip L10 is a 32-bit (RV32) core, designed by [https://codasip.com/products/codasip-risc-v-processors/ Codasip]. __TOC__ = Minimum required J-Link software version =...")
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Revision as of 14:22, 10 June 2021

The Codasip L10 is a 32-bit (RV32) core, designed by Codasip.

Minimum required J-Link software version

The L10 device selection is supported since V7.24 of the J-Link software.

RTT support

As the core does not support System Bus Access (SBA), RTT is not supported for this core.

HSS access

As the core does not support System Bus Access (SBA), HSS is not supported for this core.