Difference between revisions of "ESWIN ECR2560"
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==Watchdog Handling== |
==Watchdog Handling== |
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| + | *A watchdog is not fed during flash programming. |
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| − | *The device has a watchdog WDT. |
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| − | *The watchdog is fed during flash programming. |
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==Device Specific Handling== |
==Device Specific Handling== |
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Revision as of 09:43, 28 September 2023
The ESWIN ECR2560 are 32-bit microcontrollers based on RISC-V core with radio.
Contents
Flash Banks
Internal Flash
| Flash Bank | Base address | Size | J-Link Support |
|---|---|---|---|
| Internal Flash | 0x40400000 | 256 KB | 
|
Watchdog Handling
- A watchdog is not fed during flash programming.
Device Specific Handling
Reset
- The devices uses normal RISC-V reset, no special handling necessary, like described here.
Evaluation Boards
- ESWINEMU32VL170 TEST BRD evaluation board: http://wiki.segger.com/ESWIN_EMU32VL170_TEST_BRD
Example Application
- ESWINEMU32VL170 TEST BRD evaluation board: http://wiki.segger.com/ESWIN_EMU32VL170_TEST_BRD#Example_Project
