Difference between revisions of "GigaDevice GD32103C-START"
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! J-Link Pin || Connector !! Pin || Name |
! J-Link Pin || Connector !! Pin || Name |
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|- |
|- |
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− | | VTref || |
+ | | VTref || JP5 || 19 || +3V3 |
|- |
|- |
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− | | GND || |
+ | | GND || JP6 || 1 || GND |
|- |
|- |
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− | | TMS/SWDIO || |
+ | | TMS/SWDIO || JP6 || 40 || PA13 |
|- |
|- |
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− | | TCK/SWCLK || JP5 || |
+ | | TCK/SWCLK || JP5 || 37 || PA14 |
|} |
|} |
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− | *Power the board via |
+ | *Power the board via CN1. |
* Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output should look as follows: |
* Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output should look as follows: |
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[[File:GigaDevice_GD32103C-START_GD32F103VC_connect.png|400px]] |
[[File:GigaDevice_GD32103C-START_GD32F103VC_connect.png|400px]] |
Latest revision as of 11:47, 5 April 2024
This article describes specifics for the GigaDevice GD32103C-START evaluation board.
Preparing for J-Link
- Connect the J-Link to this pins:
J-Link Pin | Connector | Pin | Name |
---|---|---|---|
VTref | JP5 | 19 | +3V3 |
GND | JP6 | 1 | GND |
TMS/SWDIO | JP6 | 40 | PA13 |
TCK/SWCLK | JP5 | 37 | PA14 |
- Power the board via CN1.
- Verify the Connection with e.g. J-Link Commander. The output should look as follows:
Example Project
The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the GigaDevice GD32103C-START.
It is a simple Hello World sample linked into the internal flash.
SETUP
- Embedded Studio: V8.10b
- Hardware: GigaDevice GD32103C-START
- Link: File:GigaDevice GD32F103VC TestProject ES V810b.zip