Difference between revisions of "GigaDevice GD32350R-EVAL"
(→Preparing for J-Link) |
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== Preparing for J-Link == |
== Preparing for J-Link == |
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− | *Connect the J-Link to |
+ | *Connect the J-Link to the JTAG header (JP3) |
− | {| class="seggertable" |
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− | |- |
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− | ! J-Link Pin || Connector !! Pin || Name |
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− | |- |
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− | | VTref || JP1 || 4 || +3V3 |
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− | |- |
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− | | GND || JP1 || 3 || GND |
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− | |- |
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− | | TMS/SWDIO || JP1 || 2 || IO |
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− | |- |
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− | | TCK/SWCLK || JP1 || 1 || CK |
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− | |} |
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*Power the board via CN100. |
*Power the board via CN100. |
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* Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output should look as follows: |
* Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output should look as follows: |
Revision as of 15:21, 2 April 2024
This article describes specifics for the GigaDevice GD32F310C-EVAL evaluation board.
Preparing for J-Link
- Connect the J-Link to the JTAG header (JP3)
- Power the board via CN100.
- Verify the Connection with e.g. J-Link Commander. The output should look as follows:
Example Project
The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the GigaDevice GD32350R-EVAL.
It is a simple Hello World sample linked into the internal flash.
SETUP
- Embedded Studio: V7.12a
- Hardware: GigaDevice GD32350R-EVAL
- Link: File:TODO.zip