Difference between revisions of "GigaDevice GD32C1"
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| Information flash || 0x1FFFB000|| 18 KB || style="text-align:center;"| {{NO}} |
| Information flash || 0x1FFFB000|| 18 KB || style="text-align:center;"| {{NO}} |
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| − | | Option Bytes || 0x1FFFF800 || |
+ | | Option Bytes || 0x1FFFF800 || 16 B || style="text-align:center;"| {{YES}} |
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| OTP || 0x1FFF7000 || 512 B || style="text-align:center;"| {{NO}} |
| OTP || 0x1FFF7000 || 512 B || style="text-align:center;"| {{NO}} |
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Revision as of 16:09, 16 February 2024
The GigaDevice GD32C1 series are 32-bit general-purpose microcontrollers based on the ARM Cortex-M4 processor.
Contents
Flash Banks
Internal Flash
| Flash Bank | Base address | Size | J-Link Support |
|---|---|---|---|
| Main flash | 0x08000000 | Up to 256 KB | 
|
| Information flash | 0x1FFFB000 | 18 KB | 
|
| Option Bytes | 0x1FFFF800 | 16 B |
|
| OTP | 0x1FFF7000 | 512 B |
|
On-Chip Memory Regions
The internal flash is divided into 4 different regions:
- Main Flash Block (0x08000000 - 0x0801FFFF)
- Information Block (0x1FFFB000 - 0x1FFFF7FF)
- Option bytes Block (0x1FFFF800 - 0x1FFFF80F)
- One-time program Block (0x1FFF7000 - 0x1FFF71FF)
For now, the Main Flash Block is supported, only.
Reset
No special reset is required.
Evaluation Boards
- GigaDevice GD32C113C-START: https://wiki.segger.com/GigaDevice_GD32C113C-START
Example Application
- GigaDevice GD32C113C-START: https://wiki.segger.com/GigaDevice_GD32C113C-START#Example_Project
