Difference between revisions of "GigaDevice GD32F303B-START"
(→Preparing for J-Link) |
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== Preparing for J-Link == |
== Preparing for J-Link == |
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− | *Connect the J-Link to ...... |
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*Connect the J-Link to this pins: |
*Connect the J-Link to this pins: |
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{| class="seggertable" |
{| class="seggertable" |
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! J-Link Pin || Connector !! Pin || Name |
! J-Link Pin || Connector !! Pin || Name |
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|- |
|- |
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− | | VTref || || || |
+ | | VTref || JP3 || 1 || +V |
|- |
|- |
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− | | GND || || || |
+ | | GND || JP3 || 4 || G |
|- |
|- |
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− | | |
+ | | TMS/SWDIO || JP3 || 2 || IO |
|- |
|- |
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− | | |
+ | | TCK/SWCLK || JP3 || 3 || CK |
− | |- |
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− | | TMS/SWDIO || || || |
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− | |- |
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− | | TCK/SWCLK || || || |
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− | |- |
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− | | RTCK || || || |
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− | |- |
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− | | TDO/SWO || || || |
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− | |- |
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− | | RESET || || || |
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− | |- |
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− | | DBGRQ || || || |
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− | |- |
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− | | 5V-Supply || || || |
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− | |||
|} |
|} |
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− | *Power the board via |
+ | *Power the board via CN100. |
* Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output should look as follows: |
* Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output should look as follows: |
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'''[PICTURE OF CONNECT]''' |
'''[PICTURE OF CONNECT]''' |
Revision as of 14:46, 27 February 2024
This article describes specifics for the GigaDevice GD32F303B-START evaluation board.
Preparing for J-Link
- Connect the J-Link to this pins:
J-Link Pin | Connector | Pin | Name |
---|---|---|---|
VTref | JP3 | 1 | +V |
GND | JP3 | 4 | G |
TMS/SWDIO | JP3 | 2 | IO |
TCK/SWCLK | JP3 | 3 | CK |
- Power the board via CN100.
- Verify the Connection with e.g. J-Link Commander. The output should look as follows:
Example Project
The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the [SiliconVendor] [EvalBoardName].
It is a simple Hello World sample linked into the internal flash.
SETUP
- J-Link software: V7.xx
- Embedded Studio: V7.20
- Hardware: [SiliconVendor] [EvalBoardName]
- Link: File:VENDOR DEVICENAME TestProject ES V452b.zip