Difference between revisions of "GigaDevice GD32F303B-START"
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*Power the board via CN100. |
*Power the board via CN100. |
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* Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output should look as follows: |
* Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output should look as follows: |
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+ | [[File:GigaDevice_GD23F303B-START_GD32F303CB_connect.png|400px]] |
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− | '''[PICTURE OF CONNECT]''' |
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− | [[File:VENDOR_DEVICE_CONNECT.PNG|400px]] |
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== Example Project== |
== Example Project== |
Revision as of 14:51, 27 February 2024
This article describes specifics for the GigaDevice GD32F303B-START evaluation board.
Preparing for J-Link
- Connect the J-Link to this pins:
J-Link Pin | Connector | Pin | Name |
---|---|---|---|
VTref | JP3 | 1 | +V |
GND | JP3 | 4 | G |
TMS/SWDIO | JP3 | 2 | IO |
TCK/SWCLK | JP3 | 3 | CK |
- Power the board via CN100.
- Verify the Connection with e.g. J-Link Commander. The output should look as follows:
Example Project
The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the [SiliconVendor] [EvalBoardName].
It is a simple Hello World sample linked into the internal flash.
SETUP
- J-Link software: V7.xx
- Embedded Studio: V7.20
- Hardware: [SiliconVendor] [EvalBoardName]
- Link: File:VENDOR DEVICENAME TestProject ES V452b.zip