Difference between revisions of "GigaDevice GD32F4"

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(→‎Internal Flash)
(→‎Internal Flash)
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| OTP Block || 0x1FFF0000 || 528 B || style="text-align:center;"| {{NO}}
 
| OTP Block || 0x1FFF0000 || 528 B || style="text-align:center;"| {{NO}}
 
|-
  
|-
−
| Option Bytes Bank 0 || 0x1FFFC000 || 16 B || style="text-align:center;"| {{YES}}
+
| Option Bytes 0 (GD32F403) || 0x1FFFE000 || 16 B || style="text-align:center;"| {{YES}}
  +
|-
  +
| Option Bytes Bank 0 (GD32F4xx) || 0x1FFFC000 || 16 B || style="text-align:center;"| {{NO}}
 
|-
  
|-
 
| Option Bytes Bank 1 || 0x1FFEC000 || 16 B || style="text-align:center;"| {{NO}}
 
| Option Bytes Bank 1 || 0x1FFEC000 || 16 B || style="text-align:center;"| {{NO}}

Revision as of 15:30, 4 March 2024

The GigaDevice GD32F4 series are 32-bit general-purpose microcontrollers based on the ARM Cortex-M4 processor.

Flash Banks

Internal Flash

Flash Bank Base address Size J-Link Support
Main flash 0x08000000 Up to 3072 KB YES.png
OTP Block 0x1FFF0000 528 B NO.png
Option Bytes 0 (GD32F403) 0x1FFFE000 16 B YES.png
Option Bytes Bank 0 (GD32F4xx) 0x1FFFC000 16 B NO.png
Option Bytes Bank 1 0x1FFEC000 16 B NO.png

Watchdog Handling

  • The device does have 2 watchdogs, FWDGT and WWDGT.
  • The WWDGT watchdog is fed during flash programming.

Device Specific Handling

Connect

  • On Connect, protection level is checked. For further information regarding this, please click here.

Reset

  • The device uses normal Cortex-M reset, no special handling necessary, like described here.

Evaluation Boards

Example Application

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