Difference between revisions of "GigaDevice GD32W515"
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| Main flash(S) || 0x0C000000 || Up to 2 MB || style="text-align:center;"| {{YES}} |
| Main flash(S) || 0x0C000000 || Up to 2 MB || style="text-align:center;"| {{YES}} |
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| + | |- |
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| + | | QSPI flash(NS) || 0x90000000 || Up to 32 MB || style="text-align:center;"| {{NO}} |
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==Watchdog Handling== |
==Watchdog Handling== |
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*The device does have 2 watchdogs, FWDGT and WWDGT. |
*The device does have 2 watchdogs, FWDGT and WWDGT. |
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| − | * |
+ | *Both watchdogs are fed during flash programming. |
==Device Specific Handling== |
==Device Specific Handling== |
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Revision as of 15:34, 7 May 2024
The GigaDevice GD32W515 series are 32-bit general-purpose microcontrollers based on the ARM Cortex-M33 processor.
Contents
Flash Banks
Internal Flash
| Flash Bank | Base address | Size | J-Link Support |
|---|---|---|---|
| Main flash(NS) | 0x08000000 | Up to 2 MB | 
|
| Main flash(S) | 0x0C000000 | Up to 2 MB |
|
| QSPI flash(NS) | 0x90000000 | Up to 32 MB | 
|
Watchdog Handling
- The device does have 2 watchdogs, FWDGT and WWDGT.
- Both watchdogs are fed during flash programming.
Device Specific Handling
Connect
- On Connect, protection level is checked. For further information regarding this, please click here.
Reset
- The device uses normal Cortex-M reset, no special handling necessary, like described here.
