Difference between revisions of "Infineon CY-SD2220"

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(Created page with "__TOC__ This article describes specifics for the Infineon CY-SD2220 evaluation board.<br> '''[PICTURE OF BOARD]''' 450px == Preparing for J-Lin...")
 
(SETUP)
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This article describes specifics for the Infineon CY-SD2220 evaluation board.<br>
 
This article describes specifics for the Infineon CY-SD2220 evaluation board.<br>
  +
[[File:Infineon_CY-SD2220_Rev01_CYPD7191-40LDXS_board.jpg|450px]]
'''[PICTURE OF BOARD]'''
 
[[File:VENDOR_BOARDNAME.jpg|450px]]
 
   
 
== Preparing for J-Link ==
 
== Preparing for J-Link ==
*Connect the J-Link to ......
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*Connect the J-Link to J18:
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**GND on J18.2
*Power the board via........
 
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**SWDIO on J18.5
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**SWCLK on J18.4
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**Reset on J18.3
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**VTref on TP13
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*Power the board via J5.
 
* Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output should look as follows:
 
* Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output should look as follows:
  +
[[File:Infineon__CY-SD2220_Rev01_CYPD7191-40LDXS_connect.png|400px]]
'''[PICTURE OF CONNECT]'''
 
[[File:VENDOR_DEVICE_CONNECT.PNG|400px]]
 
   
 
== Example Project==
 
== Example Project==
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It is a simple Hello World sample linked into the internal flash.<br>
 
It is a simple Hello World sample linked into the internal flash.<br>
 
====SETUP====
 
====SETUP====
*J-Link software: V7.xx
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*J-Link software: V7.94k
 
*Embedded Studio: V7.20
 
*Embedded Studio: V7.20
*Hardware: [SiliconVendor] [EvalBoardName]
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*Hardware: Infineon CY-SD2220
*Link: [[File:VENDOR_DEVICENAME_TestProject_ES_V452b.zip]]
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*Link: [[File:Infineon_CY-SD2220_Rev01_CYPD7191-40LDXS_TestProject_ES_7V20.zip]]

Revision as of 10:56, 22 February 2024

This article describes specifics for the Infineon CY-SD2220 evaluation board.
Infineon CY-SD2220 Rev01 CYPD7191-40LDXS board.jpg

Preparing for J-Link

  • Connect the J-Link to J18:
    • GND on J18.2
    • SWDIO on J18.5
    • SWCLK on J18.4
    • Reset on J18.3
    • VTref on TP13
  • Power the board via J5.
  • Verify the Connection with e.g. J-Link Commander. The output should look as follows:

Infineon CY-SD2220 Rev01 CYPD7191-40LDXS connect.png

Example Project

The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the Infineon CY-SD2220.
It is a simple Hello World sample linked into the internal flash.

SETUP