Difference between revisions of "J-Link OB SAM3U NordicSemi"
(→Hardware flow control support) |
(Redirected page to J-Link OB) |
||
(15 intermediate revisions by the same user not shown) | |||
Line 1: | Line 1: | ||
+ | #REDIRECT [[J-Link OB]] |
||
− | __TOC__ |
||
− | |||
− | = VCOM functionality = |
||
− | This J-Link model supports VCOM. |
||
− | |||
− | == Pin driving policy == |
||
− | The following pins are available on this OB: |
||
− | * OB_Tx (driven by J-Link OB) |
||
− | * OB_Rx (driven by target) |
||
− | * CTS (driven by target. LOW == Target ready to receive data) |
||
− | * RTS (driven by J-Link OB. LOW == J-Link OB ready to receive data) |
||
− | J-Link OB starts driving its VCOM output pins as soon as it receives a "set baudrate" command. This command is send by the PC as soon as a COM port is opened. Unfortunately, there is no specific command / packet etc. send by the PC in case a COM port is opened. Therefore the "set baudrate" approach is the only one to detect COM port activity. |
||
− | |||
− | J-Link OB stops driving the RTS pin if J-Link OB detects that hardware flow control is not used on the target side. |
||
− | |||
− | == Hardware flow control support == |
||
− | Hardware flow control is supported by this J-Link OB. By default, J-Link detects at runtime if the target uses flow control or not. |
||
− | This is done as follows: |
||
− | * If CTS is detected as HIGH (Target not ready) before the first character is sent by J-Link OB, the pin is assumed to be not used by the target and flow control on the J-Link side gets disabled (CTS is ignored from now on, J-Link stops driving RTS) |
||
− | |||
− | === Force or disable hardware flow control === |
||
− | It is possible to configure J-Link OB to bypass the hardware flow control auto-detection in the firmware and assume that hardware flow control is always or never used. This can be done via J-Link Commander and the following command: |
||
− | |||
− | <!-- This entry will overwrite the existing device entry in the J-Link software, so that a custom flash algorithm is used for the internal flash --> |
||
− | <ChipInfo Vendor="ST" Name="STM32F767ZI" Core="JLINK_CORE_CORTEX_M7" /> |
||
− | <FlashBankInfo Name="Internes Flash" BaseAddr="0x08000000" MaxSize="0x00200000 " Loader="ST_STM32F7xxxx_2MB_DualBank.elf" LoaderType="FLASH_ALGO_TYPE_OPEN" /> |
||
− | </Device> |
Latest revision as of 10:23, 26 March 2019
Redirect to: