Difference between revisions of "Microchip PIC32CM Lx"
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==Device Specific Handling== |
==Device Specific Handling== |
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===Reset=== |
===Reset=== |
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− | *The devices uses normal Cortex-M reset, but special communication with BOOT Rom is done afterwards. |
+ | *The devices uses normal Cortex-M reset, but special communication with BOOT Rom is done afterwards to put CPU in CPU park mode. |
===Attach=== |
===Attach=== |
Revision as of 07:28, 2 May 2023
. The Microchip PIC32MC Lx are Robust Security, Ultra-Low Power and Enhanced Touch Microcontrollers Based on Arm® Cortex®-M23 Core.
Contents
Flash Banks
Internal Flash
Flash Bank | Base address | Size | J-Link Support |
---|---|---|---|
Internal Flash | 0x00000000 | 256/512 KB | |
Data Flash | 0x00400000 | 8/16 KB | |
User Row | 0x00804000 | 36 B | |
BOCOR | 0x0080C000 | 8/32/48 B |
Watchdog Handling
- If the watchdog is enabled, it is feed.
- If watchdog is in window mode, no feeding is done, because timer registers are no accessible.
Device Specific Handling
Reset
- The devices uses normal Cortex-M reset, but special communication with BOOT Rom is done afterwards to put CPU in CPU park mode.
Attach
Attach is supported if device is not secured.
This is called hot plugging by Microchip.
Evaluation Boards
- [SiliconVendor] [EvalBoardName] evaluation board: http://techwiki.segger.local/WikiTemplateEvalBoard
Example Application
- [SiliconVendor] [EvalBoardName] evaluation board: http://techwiki.segger.local/WikiTemplateEvalBoard#Example_Project