Difference between revisions of "MindMotion MM32F5"
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External QSPI Flash starting at 0x9000 0000 (End is defined by QSPI flash Size)<br> |
External QSPI Flash starting at 0x9000 0000 (End is defined by QSPI flash Size)<br> |
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For now, the J-Link supports only this sections and MM32F5270 Family. |
For now, the J-Link supports only this sections and MM32F5270 Family. |
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| + | Pay attention, for debug an flash program support maximum CPU Frequency is 96 MHz, not 120 MHz. |
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==Reset== |
==Reset== |
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The device uses normal reset, no special handling necessary. |
The device uses normal reset, no special handling necessary. |
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Revision as of 08:25, 4 November 2022
Contents
The Mindmotion MM32F5270 and MM32F5280 microcontroller is based on ARM®STAR-MC1 processor. Built-in
L1 ICache, DCache, instruction tightly coupled memory ITCM and data tightly coupled memory DTCM,
with high performance and low power consumption.
Internal Flash
256 Kb (MM32F5270 and MM32F5280)
QSPI Flash
Up to 256Mb external QSPI Flash (MM32F5270)
Up to 2048Kb internal QSPI Flash (MM32F5280)
Supported Regions
Internal Flash 0x0800 0000 - 0x0803 FFFF
External QSPI Flash starting at 0x9000 0000 (End is defined by QSPI flash Size)
For now, the J-Link supports only this sections and MM32F5270 Family.
Pay attention, for debug an flash program support maximum CPU Frequency is 96 MHz, not 120 MHz.
Reset
The device uses normal reset, no special handling necessary.
Evaluation Boards
- Mindmotion PLUS5270 MM32F5270 evaluation board: https://wiki.segger.com/Mindmotion_PLUS5270_MM32F5270
Example Application
- Mindmotion PLUS5270 MM32F5270 evaluation board: https://wiki.segger.com/Mindmotion_PLUS5270_MM32F5270#Example_Project
