Difference between revisions of "MindMotion MM32F5"
(→Example Application) |
|||
Line 11: | Line 11: | ||
|- |
|- |
||
| MM32F5233 ||0x08000000 || 128 KB || YES |
| MM32F5233 ||0x08000000 || 128 KB || YES |
||
+ | |- |
||
+ | | MM32F5333 ||0x08000000 || 128 KB || YES |
||
|- |
|- |
||
| MM32F5277 ||0x08000000 || 256 KB || YES |
| MM32F5277 ||0x08000000 || 256 KB || YES |
||
Line 41: | Line 43: | ||
*** Additional information *** |
*** Additional information *** |
||
* Pay attention, for debug and flash program support maximum CPU Frequency is 96 MHz. |
* Pay attention, for debug and flash program support maximum CPU Frequency is 96 MHz. |
||
− | * After erasing the option byte on MM32F5233 devices, the correct boot address has to be programmed at BOOT_ADDR. |
+ | * After erasing the option byte on MM32F5233/MM32F5333 devices, the correct boot address has to be programmed at BOOT_ADDR. |
==Reset== |
==Reset== |
||
Line 47: | Line 49: | ||
==Minimum requirements== |
==Minimum requirements== |
||
− | * J-Link software V7. |
+ | * J-Link software V7.92e or later |
==Evaluation Boards== |
==Evaluation Boards== |
Revision as of 13:27, 7 September 2023
Contents
The Mindmotion MM32F5270 and MM32F5280 microcontroller is based on ARM®STAR-MC1 processor. Built-in
L1 ICache, DCache, instruction tightly coupled memory ITCM and data tightly coupled memory DTCM,
with high performance and low power consumption.
Supported Flash Banks
Internal Flash
Device | StartAddr | Size | J-Link Support |
---|---|---|---|
MM32F5233 | 0x08000000 | 128 KB | YES |
MM32F5333 | 0x08000000 | 128 KB | YES |
MM32F5277 | 0x08000000 | 256 KB | YES |
MM32F5287 | 0x08000000 | 256 KB | YES |
QSPI flash
Device | StartAddr | Size | J-Link Support |
---|---|---|---|
MM32F5277 | 0x90000000 | External, up to 256MB | YES |
MM32F5287 | 0x90000000 | In package, 1024/2048KB | YES |
Option Byte
Device | StartAddr | Size | J-Link Support |
---|---|---|---|
MM32F5233 | 0x1FFFF800 | 512 Byte | YES |
MM32F5277 | 0x1FFFF800 | 512 Byte | YES |
MM32F5287 | 0x1FFFF800 | 512 Byte | YES |
*** Additional information ***
- Pay attention, for debug and flash program support maximum CPU Frequency is 96 MHz.
- After erasing the option byte on MM32F5233/MM32F5333 devices, the correct boot address has to be programmed at BOOT_ADDR.
Reset
The device uses normal reset, no special handling necessary.
Minimum requirements
- J-Link software V7.92e or later
Evaluation Boards
- Mindmotion PLUS5270 MM32F5270 evaluation board: https://wiki.segger.com/Mindmotion_PLUS5270_MM32F5270
- Mindmotion BIRD-F3/F5 MM32F5287 evaluation board: https://wiki.segger.com/Mindmotion_BIRD-F3F5_MM32F5287
- Mindmotion Mini-F5233-MM32F5233D7P evaluation board: https://wiki.segger.com/Mindmotion_Mini-F5233-MM32F5233D7P
Example Application
- Mindmotion PLUS5270 MM32F5270 evaluation board: https://wiki.segger.com/Mindmotion_PLUS5270_MM32F5270#Example_Project
- Mindmotion BIRD-F3/F5 MM32F5287 evaluation board: https://wiki.segger.com/Mindmotion_BIRD-F3F5_MM32F5287#Example_Project
- Mindmotion Mini-F5233-MM32F5233D7P evaluation board: https://wiki.segger.com/Mindmotion_Mini-F5233-MM32F5233D7P#Example_Project