MindMotion MM32F5

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Revision as of 08:02, 7 September 2023 by Torben.scharping (talk | contribs) (Minimum requirements)
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The Mindmotion MM32F5270 and MM32F5280 microcontroller is based on ARM®STAR-MC1 processor. Built-in
L1 ICache, DCache, instruction tightly coupled memory ITCM and data tightly coupled memory DTCM,
with high performance and low power consumption.

Supported Flash Banks

Internal Flash

Device StartAddr Size J-Link Support
MM32F5233 0x08000000 128 KB YES
MM32F5277 0x08000000 256 KB YES
MM32F5287 0x08000000 256 KB YES

QSPI flash

Device StartAddr Size J-Link Support
MM32F5277 0x90000000 External, up to 256MB YES
MM32F5287 0x90000000 In package, 1024/2048KB YES

Option Byte

Device StartAddr Size J-Link Support
MM32F5233 0x1FFFF800 512 Byte YES
MM32F5277 0x1FFFF800 512 Byte YES
MM32F5287 0x1FFFF800 512 Byte YES
  *** Additional information ***

External QSPI Flash starting at 0x9000 0000 (End is defined by QSPI flash Size)
Pay attention, for debug and flash program support maximum CPU Frequency is 96 MHz.

Reset

The device uses normal reset, no special handling necessary.

Minimum requirements

  • J-Link software V7.92d or later

Evaluation Boards

Example Application