NXP MCXN11

From SEGGER Wiki
Revision as of 13:43, 9 February 2024 by Torben.scharping (talk | contribs) (Created page with "__TOC__ The '''NXP MCXN11''' are single core Arm Cortex-M33 microprocessors. ==Flash Banks== ===Internal Flash=== {| class="seggertable" |- ! Flash Bank || Base address !! Si...")
(diff) ← Older revision | Latest revision (diff) | Newer revision → (diff)
Jump to: navigation, search

The NXP MCXN11 are single core Arm Cortex-M33 microprocessors.

Flash Banks

Internal Flash

Flash Bank Base address Size J-Link Support
Main flash (NS) 0x00000000 Up to 2 MB YES.png
Main flash (S) 0x10000000 Up to 2 MB YES.png

ECC RAM

  • Device has ECC RAM with various settings.

Device Specific Handling

Init/Setup

  • 64KB RAMC @ 0x20010000 is used, if it set to ECC_ENABLE, it is initialized.
  • Enables debugging

Reset

  • Device specific reset is performed.

Attach

  • Attach is supported if RAMC is not set to ECC_ENABLE.

Evaluation Boards

Example Application