Difference between revisions of "NXP RW61x"
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| − | The '''NXP RW61x''' are |
+ | The '''NXP RW61x''' are Cortex-M33 based Wireless MCUs. |
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*No Watchdog handling |
*No Watchdog handling |
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| + | ==Device Specific Handling== |
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| − | =Device Specific Handling== |
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| − | ===Connect=== |
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===Reset=== |
===Reset=== |
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| + | *The device uses custom reset: Reset and Halt after Bootloader. |
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| − | *The devices uses normal Cortex-M reset, no special handling necessary, like described [[J-Link_Reset_Strategies#Type_0:_Normal | here]]. |
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| − | *The devices uses Cortex-M Core reset, no special handling necessary, like described [[J-Link_Reset_Strategies#Type_1:_Core | here]]. |
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| − | *The devices uses Cortex-M Rest Pin, no special handling necessary, like described [[J-Link_Reset_Strategies#Type_2:_ResetPin | here]]. |
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| − | *The devices uses Cortex-A reset, no special handling necessary, like described [[J-Link_Reset_Strategies#Strategies for Cortex-A devices | here]]. |
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| − | *The devices uses Cortex-R reset, no special handling necessary, like described [[J-Link_Reset_Strategies#Strategies for Cortex-R devices | here]]. |
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| − | *The devices uses ARMv8-A reset, no special handling necessary, like described [[J-Link_Reset_Strategies#Strategies for ARMv8-A devices | here]]. |
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| − | *The devices uses ARMv8-R reset, no special handling necessary, like described [[J-Link_Reset_Strategies#Strategies for ARMv8-R devices | here]]. |
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| − | *The device uses custom reset:..... |
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| − | ==Limitations== |
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| − | ===Dual Core Support=== |
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| − | Some XXX devices feature a second core. Right now, the J-Link software does support the main core, only. Support for the second core is planned for future versions. |
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===Attach=== |
===Attach=== |
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| − | Attach is not supported |
+ | Attach is not supported. |
| − | ===Security=== |
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==Evaluation Boards== |
==Evaluation Boards== |
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| + | *NXP RD-RW616-BGA_IPA-2A/1A evaluation board: [[NXP RD-RW616-BGA_IPA-2A/1A]] |
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| − | *[SiliconVendor] [EvalBoardName] evaluation board: http://techwiki.segger.local/WikiTemplateEvalBoard |
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==Example Application== |
==Example Application== |
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| + | *NXP RD-RW616-BGA_IPA-2A/1A evaluation board: [[NXP RD-RW616-BGA_IPA-2A/1A#Example Project]] |
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| − | *[SiliconVendor] [EvalBoardName] evaluation board: http://techwiki.segger.local/WikiTemplateEvalBoard#Example_Project |
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Revision as of 11:25, 10 October 2023
The NXP RW61x are Cortex-M33 based Wireless MCUs.
Contents
Flash Banks
External QSPI Flash
| Flash Bank | Base address | Size | J-Link Support |
|---|---|---|---|
| QSPI | 0x08000000 | Up to 128MB | 
|
QSPI flash programming requires special handling compared to internal flash. For more information about this, please see the [[QSPI Flash Programming Support | Device has only one pin configuration.
Watchdog Handling
- No Watchdog handling
Device Specific Handling
Reset
- The device uses custom reset: Reset and Halt after Bootloader.
Attach
Attach is not supported.
Evaluation Boards
- NXP RD-RW616-BGA_IPA-2A/1A evaluation board: NXP RD-RW616-BGA_IPA-2A/1A
Example Application
- NXP RD-RW616-BGA_IPA-2A/1A evaluation board: NXP RD-RW616-BGA_IPA-2A/1A#Example Project
