Difference between revisions of "NXP S32K148"

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(Created page with "__TOC__ The NXP S32K148 series are Cortex-M4 based 32-bit microcontrollers. ==Internal Flash== ===Supported Regions=== The internal flash is divided into two different regions...")
 
(Internal Flash)
 
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__TOC__
 
__TOC__
 
The NXP S32K148 series are Cortex-M4 based 32-bit microcontrollers.
 
The NXP S32K148 series are Cortex-M4 based 32-bit microcontrollers.
==Internal Flash==
+
==Flash Banks==
===Supported Regions===
+
===Internal Flash===
  +
{| class="seggertable"
The internal flash is divided into two different regions: Program flash and FlexNVM.
 
{| class="wikitable"
 
 
|-
 
|-
! Flash bank !! Size (KiB) || Memory region
+
! Flash Bank || Base address !! Size || J-Link Support
 
|-
 
|-
| Program flash || 1536 || 0x00000000 - 0x0017FFFF
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| Program flash || 0x00000000 || Up to 1536 KB || style="text-align:center;"| {{YES}}
 
|-
 
|-
| FlexNVM || 512 || 0x10000000 - 0x1007FFFF
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| FlexNVM || 0x10000000 || 512 KB || style="text-align:center;"| {{YES}}
 
|}
 
|}
  +
   
 
{{Note| The program flash memory contains a 16-byte flash configuration field at address 0x400 that stores default protection settings and security information that allows the MCU to restrict access to the FTFM module.
 
{{Note| The program flash memory contains a 16-byte flash configuration field at address 0x400 that stores default protection settings and security information that allows the MCU to restrict access to the FTFM module.
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'''Programming this area may lead to the device being protected or locked'''
 
'''Programming this area may lead to the device being protected or locked'''
 
}}
 
}}
  +
  +
==Watchdog Handling==
  +
*The device has a watchdog (WDOG).
  +
*The watchdog is fed during flash programming.
  +
  +
==Device Specific Handling==
  +
===Connect===
  +
*The J-Link determines the security state as part of the connect sequence. If a secured device is detected, an un-secure is offered via dialog.
  +
===Reset===
  +
*The devices uses normal Cortex-M reset, no special handling necessary, like described [[J-Link_Reset_Strategies#Type_0:_Normal | here]].
  +
==Evaluation Boards==
  +
*TBD
  +
==Example Application==
  +
*TBD

Latest revision as of 14:50, 29 November 2023

The NXP S32K148 series are Cortex-M4 based 32-bit microcontrollers.

Flash Banks

Internal Flash

Flash Bank Base address Size J-Link Support
Program flash 0x00000000 Up to 1536 KB YES.png
FlexNVM 0x10000000 512 KB YES.png


Note:
The program flash memory contains a 16-byte flash configuration field at address 0x400 that stores default protection settings and security information that allows the MCU to restrict access to the FTFM module. 

The register portion of the flash configuration field is loaded into associated flash registers during the reset sequence.

Programming this area may lead to the device being protected or locked

Watchdog Handling

  • The device has a watchdog (WDOG).
  • The watchdog is fed during flash programming.

Device Specific Handling

Connect

  • The J-Link determines the security state as part of the connect sequence. If a secured device is detected, an un-secure is offered via dialog.

Reset

  • The devices uses normal Cortex-M reset, no special handling necessary, like described here.

Evaluation Boards

  • TBD

Example Application

  • TBD