Difference between revisions of "NXP S32M24x"
(Created page with "The '''NXP S32M24x''' series are Cortex-M4 based 32-bit microcontrollers. __TOC__ ==Flash Banks== ===Internal Flash=== {| class="seggertable" |- ! Flash Bank || Base address...") |
|||
(One intermediate revision by one other user not shown) | |||
Line 1: | Line 1: | ||
+ | [[Category:Device families]] |
||
The '''NXP S32M24x''' series are Cortex-M4 based 32-bit microcontrollers. |
The '''NXP S32M24x''' series are Cortex-M4 based 32-bit microcontrollers. |
||
__TOC__ |
__TOC__ |
||
Line 12: | Line 13: | ||
| FlexNVM || 0x10000000 || 64 KB || style="text-align:center;"| {{YES}} |
| FlexNVM || 0x10000000 || 64 KB || style="text-align:center;"| {{YES}} |
||
|} |
|} |
||
+ | |||
{{Note| The program flash memory contains a 16-byte flash configuration field at address 0x400 that stores default protection settings and security information that allows the MCU to restrict access to the FTFM module. |
{{Note| The program flash memory contains a 16-byte flash configuration field at address 0x400 that stores default protection settings and security information that allows the MCU to restrict access to the FTFM module. |
Latest revision as of 11:46, 16 May 2024
The NXP S32M24x series are Cortex-M4 based 32-bit microcontrollers.
Contents
Flash Banks
Internal Flash
Flash Bank | Base address | Size | J-Link Support |
---|---|---|---|
Program flash | 0x00000000 | Up to 512 KB | |
FlexNVM | 0x10000000 | 64 KB |
Note:
The program flash memory contains a 16-byte flash configuration field at address 0x400 that stores default protection settings and security information that allows the MCU to restrict access to the FTFM module.
The register portion of the flash configuration field is loaded into associated flash registers during the reset sequence.
Programming this area may lead to the device being protected or locked
Watchdog Handling
- The device has a watchdog (WDOG).
- The watchdog is fed during flash programming.
Device Specific Handling
Connect
- The J-Link determines the security state as part of the connect sequence. If a secured device is detected, an un-secure is offered via dialog.
Reset
- The devices uses normal Cortex-M reset, no special handling necessary, like described here.
Evaluation Boards
- TBD
Example Application
- TBD