Difference between revisions of "Renesas EK-RA2A2"
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+ | __TOC__ |
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− | TBD |
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+ | This article describes specifics for the Renesas EK-RA2A2 evaluation board.<br> |
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+ | [[File:Renesas_R7FA2A2AD3CFP_EK-RA2A2_board.jpg|450px]] |
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+ | |||
+ | == Preparing for J-Link == |
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+ | *Connect the J-Link to this pins: |
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+ | {| class="seggertable" |
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+ | |- |
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+ | ! J-Link Pin || Connector !! Pin || Name |
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+ | |- |
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+ | | VTref || J2 || 1 || VCC |
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+ | |- |
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+ | | GND || J2 || 20 || VSS |
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+ | |- |
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+ | | TMS/SWDIO || J2 || 18 || P108/SWDIO |
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+ | |- |
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+ | | TCK/SWCLK || J2 || 17 || P300/SWCLK |
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+ | |} |
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+ | *Power the board via J10. |
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+ | * Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output should look as follows: |
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+ | [[File:TODO.png|400px]] |
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+ | |||
+ | == Example Project== |
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+ | The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the Renesas EK-RA2A2.<br>It is a simple Hello World sample linked into the internal flash.<br> |
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+ | ====SETUP==== |
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+ | *Embedded Studio: V7.12a |
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+ | *Hardware: Renesas EK-RA2A2 |
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+ | *Link: [[File:TODO.zip]] |
Revision as of 16:33, 15 March 2024
This article describes specifics for the Renesas EK-RA2A2 evaluation board.
Preparing for J-Link
- Connect the J-Link to this pins:
J-Link Pin | Connector | Pin | Name |
---|---|---|---|
VTref | J2 | 1 | VCC |
GND | J2 | 20 | VSS |
TMS/SWDIO | J2 | 18 | P108/SWDIO |
TCK/SWCLK | J2 | 17 | P300/SWCLK |
- Power the board via J10.
- Verify the Connection with e.g. J-Link Commander. The output should look as follows:
Example Project
The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the Renesas EK-RA2A2.
It is a simple Hello World sample linked into the internal flash.
SETUP
- Embedded Studio: V7.12a
- Hardware: Renesas EK-RA2A2
- Link: File:TODO.zip