Difference between revisions of "STM32F769I EVAL"

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(Created page with "=== QSPI Flash Programming Support === Before continuing with this article, please read the generic article about QSPI flash programming support on STM32F7 devices (STM32F...")
 
 
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=== Example implementation ===
  
=== Example implementation ===
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As described in the generic article, the reference flash algorithm is based on the SEGGER ''Open Flashloader'' and therefore needs to be added manually using a JLinkDevices.xml file. An example JLinkDevices.xml file as well as pinout used on the STM32F746 Discovery board, is given below. This example assumes a Micron N25Q128A (16MB flash) connected to the Quad-SPI interface of the STM32F746NG. For further information regarding the ''Open Flashloader'' and how to use the JLinkDevices.xml file, please refer to the J-Link User Manual (UM08001), chapter ''10 Open Flash Loader''.
 +
As described in the generic article, the reference flash algorithm is based on the SEGGER ''Open Flashloader'' and therefore needs to be added manually using a JLinkDevices.xml file. An example JLinkDevices.xml file as well as pinout used on the STM32F769I EVAL board, is given below. This example assumes a Micron N25Q512A (64MB flash) connected to the Quad-SPI interface of the STM32F769. For further information regarding the ''Open Flashloader'' and how to use the JLinkDevices.xml file, please refer to the J-Link User Manual (UM08001), chapter ''10 Open Flash Loader''.
   
 
====Quad-SPI Interface Pins====
  
====Quad-SPI Interface Pins====
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The ST STM32F746 Discovery uses the following port pins to interface the (Q)SPI flash.
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The ST STM32F769I EVAL uses the following port pins to interface the (Q)SPI flash.
 
{| class="wikitable"
  
{| class="wikitable"
 
|-
  
|-
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| QSPI_CS || PB6
  
| QSPI_CS || PB6
 
|-
  
|-
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| QSPI_D0 || PD11
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| QSPI_D0 || PF8
 
|-
  
|-
−
| QSPI_D1 || PD12
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| QSPI_D1 || PF9
 
|-
  
|-
−
| QSPI_D2 || PE2
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| QSPI_D2 || PF7
 
|-
  
|-
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| QSPI_D3 || PD13
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| QSPI_D3 || PF6
 
|}
  
|}
   
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<Database>
  
<Database>
 
<Device>
  
<Device>
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<ChipInfo Vendor="ST" Name="STM32F746NG" Core="JLINK_CORE_CORTEX_M7" />
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<ChipInfo Vendor="ST" Name="STM32F769NI" Core="JLINK_CORE_CORTEX_M7" />
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<FlashBankInfo Name="QSPI Flash" BaseAddr="0x90000000" MaxSize="0x01000000" Loader="ST_STM32F746G_Disco_QSPI.elf" LoaderType="FLASH_ALGO_TYPE_OPEN" />
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<FlashBankInfo Name="QSPI Flash" BaseAddr="0x90000000" MaxSize="0x04000000" Loader="ST_STM32F769I_EVAL_QSPI.elf" LoaderType="FLASH_ALGO_TYPE_OPEN" />
 
</Device>
  
</Device>
 
</Database>
  
</Database>
  +
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*[[File:ST_STM32F746G_Disco_QSPI_JLinkDevicesXML.zip]]
  
  +
For further information how to include this flashloader into your J-Link software, please refer to:<br>
  +
https://wiki.segger.com/Adding_Support_for_New_Devices#Using_a_Precompiled_Flashloader
   
 
====Flash algorithm (*.elf)====
  
====Flash algorithm (*.elf)====
 
This file contains the program routines used by the J-Link DLL during flash programming.
  
This file contains the program routines used by the J-Link DLL during flash programming.
  +
*[[File:ST_STM32F769I_EVAL_QSPI.elf]]
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*[[File:ST_STM32F746G_Disco_QSPI_ReferenceFlashAlgorithm.zip]]
  
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====IAR example project====
  
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The example project contains a simple counter loop which is linked into the (Q)SPI flash memory region @ address 0x90000000. The project includes the JLinkDevices.xml file as well as the ST_STM32F446_Reference.elf. It runs out-of-the-box. Please note, that IAR EWARM must at least use the J-Link DLL version V6.01a, which supports the Open Flash Loader.
  
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*[[File:ST_STM32F746G_Disco_QSPI_IAR7407.zip]]
  

Latest revision as of 11:15, 22 February 2018

QSPI Flash Programming Support

Before continuing with this article, please read the generic article about QSPI flash programming support on STM32F7 devices (STM32F7 (Q)SPI support).

Example implementation

As described in the generic article, the reference flash algorithm is based on the SEGGER Open Flashloader and therefore needs to be added manually using a JLinkDevices.xml file. An example JLinkDevices.xml file as well as pinout used on the STM32F769I EVAL board, is given below. This example assumes a Micron N25Q512A (64MB flash) connected to the Quad-SPI interface of the STM32F769. For further information regarding the Open Flashloader and how to use the JLinkDevices.xml file, please refer to the J-Link User Manual (UM08001), chapter 10 Open Flash Loader.

Quad-SPI Interface Pins

The ST STM32F769I EVAL uses the following port pins to interface the (Q)SPI flash.

Alternate function Port / Pin
QSPI_CLK PB2
QSPI_CS PB6
QSPI_D0 PF8
QSPI_D1 PF9
QSPI_D2 PF7
QSPI_D3 PF6

JLinkDevices.xml

<Database>
  <Device>
   <ChipInfo Vendor="ST" Name="STM32F769NI" Core="JLINK_CORE_CORTEX_M7" />
   <FlashBankInfo Name="QSPI Flash" BaseAddr="0x90000000" MaxSize="0x04000000" Loader="ST_STM32F769I_EVAL_QSPI.elf" LoaderType="FLASH_ALGO_TYPE_OPEN" />
  </Device>
</Database>

For further information how to include this flashloader into your J-Link software, please refer to:
https://wiki.segger.com/Adding_Support_for_New_Devices#Using_a_Precompiled_Flashloader

Flash algorithm (*.elf)

This file contains the program routines used by the J-Link DLL during flash programming.

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