Difference between revisions of "ST NUCLEO-WBA52CG"
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== Preparing for J-Link == |
== Preparing for J-Link == |
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− | *Connect the J-Link to |
+ | *Connect the J-Link to CN3-8(GND) CN3-9(SWDIO) CN3-11(SWDCLK) CN3-12(VTref) CN3-14(Reset). |
+ | *Set Jumper JP1 to 5-6 (5VINT) |
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− | *Power the board via........ |
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+ | *Power the board via CN3-22(GND) CN3-24(5V). |
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* Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output should look as follows: |
* Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output should look as follows: |
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[[File:ST_NUCLEO-WBA52CG_STM32WBA52CG_connect.png|400px]] |
[[File:ST_NUCLEO-WBA52CG_STM32WBA52CG_connect.png|400px]] |
Revision as of 11:32, 4 July 2023
This article describes specifics for the ST NUCLEO-WBA52CG evaluation board.
Preparing for J-Link
- Connect the J-Link to CN3-8(GND) CN3-9(SWDIO) CN3-11(SWDCLK) CN3-12(VTref) CN3-14(Reset).
- Set Jumper JP1 to 5-6 (5VINT)
- Power the board via CN3-22(GND) CN3-24(5V).
- Verify the Connection with e.g. J-Link Commander. The output should look as follows:
Example Project
The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the [SiliconVendor] [EvalBoardName].
It is a simple Hello World sample linked into the internal flash.
SETUP
- J-Link software: V7.88k
- Embedded Studio: V6.34.52b
- Hardware: ST NUCLEO-WBA52CG
- Link: File:ST NUCLEO-WBA52CG STM32WBA52CG TestProject ES V634.zip