Difference between revisions of "ST SR6P6"
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! Flash Bank || Base address !! Size || J-Link Support |
! Flash Bank || Base address !! Size || J-Link Support |
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+ | | RWW Partition 0 || 0x28000000 || 1792 KB || style="text-align:center;"| {{YES}} |
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+ | | RWW Partition 1 || 0x281C0000 || 2048 KB || style="text-align:center;"| {{YES}} |
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+ | | RWW Partition 2 || 0x28400000 || 1792 KB || style="text-align:center;"| {{YES}} |
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+ | | RWW Partition 3 || 0x285C0000 || 2048 KB || style="text-align:center;"| {{YES}} |
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+ | | RWW Partition 4 || 0x28800000 || 2048 KB || style="text-align:center;"| {{YES}} |
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+ | | RWW Partition 5 || 0x28A00000 || 2048 KB || style="text-align:center;"| {{YES}} |
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+ | | RWW Partition 6 || 0x28C00000 || 2048 KB || style="text-align:center;"| {{YES}} |
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+ | | RWW Partition 7 || 0x28E00000 || 2048 KB || style="text-align:center;"| {{YES}} |
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+ | | RWW Partition 8 || 0x29000000 || 2048 KB || style="text-align:center;"| {{YES}} |
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+ | | RWW Partition 9 || 0x29400000 || 2048 KB || style="text-align:center;"| {{YES}} |
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+ | | EEPROM / RWW 10 || 0x29E00000|| 512 KB || style="text-align:center;"| {{YES}} |
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| UTEST || 0x29F80000|| 32 KB || style="text-align:center;"| {{YES}} |
| UTEST || 0x29F80000|| 32 KB || style="text-align:center;"| {{YES}} |
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| Boot Code Sector || 0x29FB8000|| 16 KB || style="text-align:center;"| {{YES}} |
| Boot Code Sector || 0x29FB8000|| 16 KB || style="text-align:center;"| {{YES}} |
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− | | HSM Code || 0x00000000 || 512 KB || style="text-align:center;"| {{NO}} |
+ | | HSM Code / RWW 11 || 0x00000000 || 512 KB || style="text-align:center;"| {{NO}} |
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− | | HSM Data || 0x003A0000 || 128 KB || style="text-align:center;"| {{NO}} |
+ | | HSM Data / RWW 13 || 0x003A0000 || 128 KB || style="text-align:center;"| {{NO}} |
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− | | HSM UT || 0x0037C000 || 16 KB || style="text-align:center;"| {{NO}} |
+ | | HSM UT / RWW 13 || 0x0037C000 || 16 KB || style="text-align:center;"| {{NO}} |
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Revision as of 16:01, 28 April 2023
The ST SR6P6xx are Stellar P series microcontroler, which inlcudes 6 Cortex-R52+ and 3 Cortex-M4.
Flash Banks
Internal Flash
Flash Bank | Base address | Size | J-Link Support |
---|---|---|---|
RWW Partition 0 | 0x28000000 | 1792 KB | |
RWW Partition 1 | 0x281C0000 | 2048 KB | |
RWW Partition 2 | 0x28400000 | 1792 KB | |
RWW Partition 3 | 0x285C0000 | 2048 KB | |
RWW Partition 4 | 0x28800000 | 2048 KB | |
RWW Partition 5 | 0x28A00000 | 2048 KB | |
RWW Partition 6 | 0x28C00000 | 2048 KB | |
RWW Partition 7 | 0x28E00000 | 2048 KB | |
RWW Partition 8 | 0x29000000 | 2048 KB | |
RWW Partition 9 | 0x29400000 | 2048 KB | |
EEPROM / RWW 10 | 0x29E00000 | 512 KB | |
UTEST | 0x29F80000 | 32 KB | |
Boot Code Sector | 0x29FB8000 | 16 KB | |
HSM Code / RWW 11 | 0x00000000 | 512 KB | |
HSM Data / RWW 13 | 0x003A0000 | 128 KB | |
HSM UT / RWW 13 | 0x0037C000 | 16 KB |
ECC Flash
Device has ECC Flash, but no special init necessary. Please refer to the reference Manual.
ECC RAM
Device has ECC RAM, init before first use is necessary.