Difference between revisions of "ST SR6P6"

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(Internal Flash)
(Internal Flash)
Line 17: Line 17:
 
| RWW Partition 4 || 0x28800000 || 2048 KB || style="text-align:center;"| {{YES}}
 
| RWW Partition 4 || 0x28800000 || 2048 KB || style="text-align:center;"| {{YES}}
 
|-
 
|-
| RWW Partition 5 || 0x28A00000 || 2048 KB || style="text-align:center;"| {{YES}}
+
| RWW Partition 5 || 0x28C00000 || 2048 KB || style="text-align:center;"| {{YES}}
 
|-
 
|-
| RWW Partition 6 || 0x28C00000 || 2048 KB || style="text-align:center;"| {{YES}}
+
| RWW Partition 6 || 0x29000000 || 2048 KB || style="text-align:center;"| {{YES}}
 
|-
 
|-
| RWW Partition 7 || 0x28E00000 || 2048 KB || style="text-align:center;"| {{YES}}
+
| RWW Partition 7 || 0x29400000 || 2048 KB || style="text-align:center;"| {{YES}}
 
|-
 
|-
| RWW Partition 8 || 0x29000000 || 2048 KB || style="text-align:center;"| {{YES}}
+
| EEPROM / RWW 8 || 0x29E00000|| 512 KB || style="text-align:center;"| {{YES}}
|-
 
| RWW Partition 9 || 0x29400000 || 2048 KB || style="text-align:center;"| {{YES}}
 
|-
 
| EEPROM / RWW 10 || 0x29E00000|| 512 KB || style="text-align:center;"| {{YES}}
 
 
|-
 
|-
 
| UTEST / RWW 1 || 0x29F80000|| 32 KB || style="text-align:center;"| {{YES}}
 
| UTEST / RWW 1 || 0x29F80000|| 32 KB || style="text-align:center;"| {{YES}}
Line 33: Line 29:
 
| Boot Code Sector / RWW 1 || 0x29FB8000|| 16 KB || style="text-align:center;"| {{YES}}
 
| Boot Code Sector / RWW 1 || 0x29FB8000|| 16 KB || style="text-align:center;"| {{YES}}
 
|-
 
|-
| HSM Code / RWW 11 || 0x00000000 || 512 KB || style="text-align:center;"| {{NO}}
+
| HSM Code / RWW 9/10 || 0x00000000 || 512 KB || style="text-align:center;"| {{NO}}
 
|-
 
|-
| HSM Data / RWW 13 || 0x003A0000 || 128 KB || style="text-align:center;"| {{NO}}
+
| HSM Data / RWW 11 || 0x003A0000 || 128 KB || style="text-align:center;"| {{NO}}
 
|-
 
|-
| HSM UT / RWW 13 || 0x0037C000 || 16 KB || style="text-align:center;"| {{NO}}
+
| HSM UT / RWW 11 || 0x0037C000 || 16 KB || style="text-align:center;"| {{NO}}
 
|}
 
|}
   

Revision as of 16:05, 28 April 2023

The ST SR6P6xx are Stellar P series microcontroler, which inlcudes 6 Cortex-R52+ and 3 Cortex-M4.

Flash Banks

Internal Flash

Flash Bank Base address Size J-Link Support
RWW Partition 0 0x28000000 1792 KB YES.png
RWW Partition 1 0x281C0000 2048 KB YES.png
RWW Partition 2 0x28400000 1792 KB YES.png
RWW Partition 3 0x285C0000 2048 KB YES.png
RWW Partition 4 0x28800000 2048 KB YES.png
RWW Partition 5 0x28C00000 2048 KB YES.png
RWW Partition 6 0x29000000 2048 KB YES.png
RWW Partition 7 0x29400000 2048 KB YES.png
EEPROM / RWW 8 0x29E00000 512 KB YES.png
UTEST / RWW 1 0x29F80000 32 KB YES.png
Boot Code Sector / RWW 1 0x29FB8000 16 KB YES.png
HSM Code / RWW 9/10 0x00000000 512 KB NO.png
HSM Data / RWW 11 0x003A0000 128 KB NO.png
HSM UT / RWW 11 0x0037C000 16 KB NO.png

ECC Flash

Device has ECC Flash, but no special init necessary. Please refer to the reference Manual.

ECC RAM

Device has ECC RAM, init before first use is necessary.