Difference between revisions of "ST STM320518-EVAL"
(Created page with "__TOC__ This article describes specifics for the ST NUCLEO-32F072B-DISCO evaluation board.<br> 400px == Preparing for J-Link == *Power...") |
|||
Line 1: | Line 1: | ||
__TOC__ |
__TOC__ |
||
− | This article describes specifics for the ST |
+ | This article describes specifics for the ST STM320518-EVAL evaluation board.<br> |
− | [[File:ST |
+ | [[File:ST STM320518-EVAL.jpeg|400px]] |
== Preparing for J-Link == |
== Preparing for J-Link == |
||
− | *Power the board via CN1 ( |
+ | *Power the board via CN1 (---) |
*Reflash the ST-LINK On-Board Into a J-Link [https://www.segger.com/products/debug-probes/j-link/models/other-j-links/st-link-on-board/ Guide] |
*Reflash the ST-LINK On-Board Into a J-Link [https://www.segger.com/products/debug-probes/j-link/models/other-j-links/st-link-on-board/ Guide] |
||
* Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output should look as follows: |
* Verify the Connection with e.g. [https://wiki.segger.com/J-Link_cannot_connect_to_the_CPU#Verify_functionality_using_J-Link_Commander J-Link Commander]. The output should look as follows: |
||
− | [[File: |
+ | [[File:STM320518-EVAL_con.PNG|400px]] |
− | *Note: select device: "STM32F072R8". |
||
== Example Project== |
== Example Project== |
||
− | The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the ST |
+ | The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the ST STM320518-EVAL.<br>It is a simple Hello World sample linked into the internal flash.<br> |
====SETUP==== |
====SETUP==== |
||
*J-Link software: V7.90 |
*J-Link software: V7.90 |
||
*Embedded Studio: V7.20 |
*Embedded Studio: V7.20 |
||
− | *Hardware: ST |
+ | *Hardware: ST STM320518-EVAL |
− | *Link: [[File: |
+ | *Link: [[File:STM320518-EVAL_Projekt.zip]] |
Revision as of 14:11, 4 August 2023
This article describes specifics for the ST STM320518-EVAL evaluation board.
Preparing for J-Link
- Power the board via CN1 (---)
- Reflash the ST-LINK On-Board Into a J-Link Guide
- Verify the Connection with e.g. J-Link Commander. The output should look as follows:
Example Project
The following example project was created with the SEGGER Embedded Studio project wizard and runs out-of-the-box on the ST STM320518-EVAL.
It is a simple Hello World sample linked into the internal flash.
SETUP
- J-Link software: V7.90
- Embedded Studio: V7.20
- Hardware: ST STM320518-EVAL
- Link: File:STM320518-EVAL Projekt.zip